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Preparation method of shallow trench isolation structure

A technology of isolation structure and shallow trench, which is applied in the field of preparation of shallow trench isolation structure, and can solve problems such as smearing defects

Inactive Publication Date: 2011-06-08
CSMC TECH FAB1
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0004] In order to solve the problem of smearing defects in the traditional shallow trench isolation process, it is necessary to provide a method for preparing a shallow trench isolation structure

Method used

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  • Preparation method of shallow trench isolation structure
  • Preparation method of shallow trench isolation structure
  • Preparation method of shallow trench isolation structure

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Embodiment Construction

[0014] The preparation method of the shallow trench isolation structure includes the following steps: S10, depositing a silicon dioxide pad layer on the silicon substrate; S20, depositing a silicon nitride layer on the pad layer to protect the active region; S30, Engraving and defining the STI trench area; S40, etching the oxide layer and nitride layer, and removing the photoresist; S50, dry etching the STI trench; S60, filling the STI trench with a high-density plasma chemical vapor deposition oxide layer, Before filling, a layer of silicon dioxide can be formed on the surface of the trench by thermal oxidation; S70, chemical mechanical grinding and removal of the nitride layer.

[0015] After many experiments and analysis, we believe that the cause of smear defects in the traditional shallow trench isolation process is that there is a significant difference in the height of the oxide layer on the nitride layer at the junction of the shallow trench isolation dense area and the...

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Abstract

The invention relates to manufacturing industry of integrated circuits, in particular to a preparation method of a shallow trench isolation structure. The preparation method comprises the following steps of: S10, growing a silicon dioxide cushion on a silicon substrate; S20, depositing a silicon nitride layer; S30, defining an STI (Shallow Trench Isolation) trench area by photoetching; S40, etching an oxide layer and a nitride layer, and eliminating photoresist; S50, etching an STI trench; S60, filling the STI trench by a high-density plasma chemical vapor deposited oxide layer; and S70, carrying out chemical mechanical polishing and eliminating the nitride layer, wherein the polishing pressure used in S70 is 2-6Psi, and the polishing time is 30-90s. The preparation method of the shallow trench isolation structure eliminates the problem of smearing in the shallow trench isolation process, can obtain the oxide layer with a good appearance and improves the electrical property of devices.

Description

【Technical field】 [0001] The invention relates to the integrated circuit manufacturing industry, in particular to a preparation method of a shallow trench isolation structure. 【Background technique】 [0002] As the process size of the integrated circuit manufacturing process becomes smaller and smaller, the traditional local oxidation of silicon (LOCOS) isolation technology can no longer meet the demand. Shallow trench isolation (shallow trench isolation, STI) technology has the advantages of good isolation effect, small footprint, etc., and can avoid the "bird's beak" phenomenon, so it is widely used in the manufacturing process of integrated circuits below 250nm. [0003] A high density plasma chemical vapor deposition (HDP CVD) process is generally used to fill the STI trenches. This is a simultaneous deposition and sputtering process. In order to increase the production rate, the current HDP CVD process usually adopts the scheme of increasing the flow rate of silane or...

Claims

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Application Information

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IPC IPC(8): H01L21/762
Inventor 平延磊张炳一孟昭生
Owner CSMC TECH FAB1
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