Flash memory and its programming method

Abstract

The invention discloses a flash memory and a programming method thereof. The flash memory at least comprises storage unit arrays, a bit line refresh circuit and a line gating circuit, wherein the storage unit arrays are arranged in rows and lines. In the invention, a current mirror circuit connected to regulation voltage is taken as a new bit line refresh circuit for refreshing the voltage on a bit line, so that the problem of node leakage on the bit line is solved; the grid leak of an NMOS (N-Channel Metal Oxide Semiconductor) of the current mirror circuit connected with the bit line is short-circuited, so that current is prevented from flowing back into the regulation voltage from programming voltage, and programming is more accurate; and moreover, a word line is driven by the regulation voltage, so that the aim of further increasing the reading speed of the flash memory can be fulfilled.

Description

technical field [0001] The present invention relates to a flash memory unit, a flash memory device and a programming method thereof, in particular to a flash memory unit capable of sharing a word line, a flash memory device and a programming method thereof. Background technique [0002] In semiconductor memory devices, flash memory (flash memory) is a volatile memory, and belongs to Erasable Programmable Read-Only Memory (EPROM). The advantage of flash memory is that it can be erased for the entire memory block, and the erasing speed is fast, which takes about one to two seconds. Therefore, in recent years, flash memory has been used in various consumer electronic products, such as digital cameras, digital video cameras, mobile phones or notebook computers. [0003] figure 1 It is a structural schematic diagram of a flash memory in the prior art, figure 2 for figure 1 Schematic diagram of the structure of the memory cell array, image 3 for figure 2 Schematic diagram...

AI Technical Summary

Problems solved by technology

[0008] However, the above-mentioned flash memory structure has the following disadvantages: due to the junction leakage, the shielding voltage Vinh may be reduced, which often disturbs the cells that are not selected for programming

[0009] In summary, it can be seen that the leakage of the junction in the prior art flash memory structure may lower the shielding voltage and cause interference to the memory cells not selected for programming. Therefore, it is necessary to propose improved technical means to solve this problem.

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