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Refresh operation method and pseudo static random access memory (PSRAM) based on same

An operation method and sub-operation technology, which is applied in the field of dynamic random access memory, can solve the problem that the access operation and refresh operation cannot be performed at the same time, and achieve the effect of fast operation speed and improved operation speed

Inactive Publication Date: 2011-11-09
FUDAN UNIV
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Problems solved by technology

[0037] The technical problem to be solved by the present invention is to provide a Gain Cell-based feature that has two sets of mutually independent write word lines and read word lines, and two sets of mutually independent write bit lines and read bit lines, so as to solve the problem of different rows of the same memory array. The problem that the access operation and the refresh operation cannot be performed at the same time

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  • Refresh operation method and pseudo static random access memory (PSRAM) based on same
  • Refresh operation method and pseudo static random access memory (PSRAM) based on same
  • Refresh operation method and pseudo static random access memory (PSRAM) based on same

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Embodiment Construction

[0068] The following introduces some of the possible embodiments of the present invention, which are intended to provide a basic understanding of the present invention, but are not intended to identify key or decisive elements of the present invention or limit the scope of protection.

[0069] In this invention, in order to shorten the access operation cycle (CT) of PSRAM based on GC, mainly save from figure 2 Shown T B Step by step to improve.

[0070] First, we continue to analyze the operating characteristics of GC to further exploit this characteristic. continue as image 3 As shown in the operating voltage table, it can be seen that for the write operation of the Gain Cell gain storage unit, the word line and bit line that determine the write situation are respectively WWL105 and WBL106, and the operating voltages of RWL107 and RBL108 are the same as the hold state ( Such as image 3 Indicated by the dotted circle in ), the relevant pass transistor is Qw (write MOS t...

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Abstract

The invention provides a refresh operation method and a pseudo static random access memory (PSRAM) based on the same, belonging to the technical field of a dynamic random access memory (DRAM). Based on the characteristic that a gain unit comprises two sets of mutually independent word lines and two sets of mutually independent bit lines, the refresh operation of one line in the storage array of the gain unit and the external access operation of any other line in the storage array of the gain unit are concurrently carried out according to the refresh operation method; and the PSRAM further correspondingly comprises a refresh control circuit, wherein the refresh control circuit is operatively used for concurrently carrying out the refresh operation of one line in the storage array of the gain unit and the external access operation of any other line in the storage array of the gain unit. The refresh operation method greatly improves the operation speed of the storage array of the gain unit; and the PSRAM based on the refresh operation method has the characteristics of high operation speed and compatibility with external SRAM interfaces.

Description

technical field [0001] The invention belongs to the technical field of dynamic random access memory (DRAM), in particular to a refresh operation method of a gain cell (Gain Cell, GC) storage array, in particular to a GainCell (gain cell) based on two groups of independent word lines and two groups of independent bit lines. Unit) operation segmentation parallel refresh operation method, and the DRAM-based Pseudo SRAM (PSRAM, pseudo static random access memory) memory using the refresh operation method. Background technique [0002] (1) DRAM Refresh [0003] The memory cells of DRAM are capacitors that contain an electrical charge that can leak away over time, resulting in data loss. In order to prevent this from happening, the DRAM must be refreshed, ie charge must be periodically restored on the individual memory cells. The DRAM refresh frequency (Refresh Frequency) depends on the design of the manufacturing process technology and the structure of the memory cell itself. ...

Claims

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Application Information

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IPC IPC(8): G11C11/403G11C11/4063
Inventor 林殷茵孟超董存霖程宽
Owner FUDAN UNIV
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