Package substrate structure and manufacturing method thereof
A technology for packaging substrates and manufacturing methods, which is used in the manufacture of semiconductor/solid-state devices, electrical components, and electrical solid-state devices, etc., can solve the problems of small solder balls, solder bridges, and unstable tin amount in the printing solder paste step, and achieves Best reliability results, excellent coplanarity, increased bonding effect
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[0027] Hereinafter, each embodiment is described in detail and examples accompanied by accompanying drawings are used as a reference basis of the present invention. In the drawings or descriptions in the specification, the same reference numerals are used for similar or identical parts. And in the drawings, the shapes or thicknesses of the embodiments may be enlarged, and marked for simplicity or convenience. Furthermore, the parts of each element in the drawings will be described separately. It should be noted that the elements not shown or described in the drawings are forms known to those skilled in the art. In addition, the specific embodiment is only A specific method used in the present invention is disclosed, which is not intended to limit the present invention.
[0028] In view of this, the embodiment of the present invention provides a packaging substrate structure, in which the area between the circuits on the substrate is filled with solder resist insulating materi...
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