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Structure and manufacturing method of array substrate

An array substrate and substrate technology, applied in semiconductor/solid-state device manufacturing, optics, instruments, etc., can solve the problems of large distance between pixel electrodes and common electrodes, abnormal gray scale of liquid crystal panels, and inability to maintain constant voltage, etc., to achieve optimal capacitance capacity Effect

Active Publication Date: 2011-12-14
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0005] Embodiments of the present invention provide a structure and a manufacturing method of an array substrate, which solves the problem of C S The distance between the pixel electrode and the common electrode in the capacitor is relatively large, and the C S Even when fully charged, the voltage that controls the liquid crystal steering cannot be kept constant, causing the LCD panel to have gray scale abnormalities caused by voltage changes at both ends of the liquid crystal.

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  • Structure and manufacturing method of array substrate
  • Structure and manufacturing method of array substrate
  • Structure and manufacturing method of array substrate

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Embodiment Construction

[0048] Embodiments of the present invention provide a structure and manufacturing method of an array substrate, which solves the problem of C S The distance between the pixel electrode and the common electrode in the capacitor is relatively large, and the C S Even when the battery is fully charged, the voltage controlling the liquid crystal steering cannot be kept constant, causing the LCD panel to have gray scale abnormalities caused by voltage changes at both ends of the liquid crystal.

[0049] Such as figure 1 As shown, the array substrate provided by the embodiment of the present invention includes a substrate 1, and a gate scan line 2, a data scan line 3, a pixel electrode 4 and a first thin film transistor 5 formed on the substrate 1. The first thin film transistor 5 The gate 51 of the grid is connected to the gate scanning line 2, the source 52 is connected to the data scanning line 3, and the drain 53 is connected to the pixel electrode 4; it also includes a storage ...

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Abstract

The invention discloses a structure of an array substrate and a manufacturing method thereof, and relates to the technical field of display. The invention aims to solve the problem that the distance between a pixel electrode and a common electrode in a storage capacity (CS) is long so abnormal gray scale is caused by change of the voltage at two ends of liquid crystals in a liquid crystal panel due to failure of retention of the constant voltage for controlling liquid crystal diversion under the condition that the CS is charged is solved. The array substrate comprises a substrate, and a grid scanning line, a data scanning line, a pixel electrode and a first thin film transistor which are formed on the substrate, wherein a grid of the first thin film transistor is connected with the grid scanning line, a source of the first thin film transistor is connected with the data scanning line, and a drain of the first thin film transistor is connected with the pixel electrode; the array substrate also comprises the storage capacitor; and a bottom electrode of the storage capacitor and the data scanning line are positioned in the same plane; and a top electrode of the storage capacitor and the pixel electrode are positioned in the same plane. The embodiment of the invention is mainly applied in the display field, and is particularly suitable for liquid crystal display panels.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a structure and a manufacturing method of an array substrate. Background technique [0002] A display that uses thin-film transistors to generate voltage to control the turning of liquid crystals is called a thin-film transistor liquid crystal display (TFT LCD). Thin film transistor liquid crystal display includes a liquid crystal panel, and the liquid crystal is sandwiched between the upper and lower layers of glass of the liquid crystal panel to form a parallel plate capacitor, which is called C LC (capacitor of liquid crystal), its size is about 0.1pF. The C LC It is used to maintain the voltage to control the transition of liquid crystal, but in practical application, in the thin film transistor TFT to C LC After fully charged, do the next TFT test on C LC During the charging period, C LC Failure to hold the voltage allows the voltage to vary, resulting in incor...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02H01L21/77G02F1/1362G02F1/1343
Inventor 张弥
Owner BOE TECH GRP CO LTD