Image mosaic processor on basis of FPGA (Field Programmable Gata Array) and image mosaic method

Abstract

The invention relates to an image mosaic processor on the basis of an FPGA (Field Programmable Gata Array), which is characterized by comprising a set of DVI (Digital Video Interactive) digital decoding circuit, a set of FPGA digital video processing circuit and a set of output interface circuit, wherein an external digital signal is connected with the DVI digital decoding circuit; a digital video signal with the minimum transformation differential signal form is subjected to decoding processing; an obtained video pixel information flow is directly fed into the FPGA digital video processing circuit; after being processed by an image processing algorithm, the signal is subjected to encoding processing to obtain the digital video signal of the minimum differential signal; and the digital video signal of the minimum differential signal is output to a mosaic wall display through the output interface circuit. The invention also provides an image mosaic method on the basis of the system. The image mosaic processor and the image mosaic method have the advantages that the image mosaic processor and the image mosaic method are not limited by the bandwidth of a PCI (Peripheral Component Interconnect) bus or the aspects of acquiring and processing capabilities.

Description

Technical field [0001] The invention relates to an image splicing processor and an image splicing method based on FPGA. Background technique [0002] At present, the large-screen splicing display system has two main methods for implementing video signal display control: one is PCI plug-in splicing, which uses a multi-screen splicing card to divide the complete video image into M×N sub video signals, and multiple sub video signals. The video signal is amplified by the host processor through the multiplexed PCI bus. Therefore, the number of splicing screens is limited by the bandwidth of the PCI bus. The second is to use the embedded splicing method. Each splicing unit has an independent video processing module. The input video is sent to each unit, and each unit performs video processing to separate out the part that should be displayed. After this part of the video signal is amplified, the hardware The circuit is driven to display the video signal to realize the purpose of spli...

AI Technical Summary

Problems solved by technology

The traditional PCI bus mode has obviously been unable to meet the demand, first of all, it suffers from the bandwidth bottleneck and has little room for development

Although the embedded mode has made some progress, it is still relatively lacking in splicing processing, signal source management, and network processing capabilities, especially streaming media.

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