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Wafer surface morphology detection method

A technology of surface topography and topography, applied in the field of detecting wafer surface topography, can solve the problems of complex structure of lithography machine, wafer focusing, increase production cost, etc., and achieve the effect of improving yield, ensuring focusing, and ensuring accuracy

Active Publication Date: 2012-05-16
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This is likely to cause issues with wafer focus
In the existing technology, it is thought to increase the size of the light spot to solve this problem, but this will make the structure of the lithography machine more complicated and increase excessive production costs, which is not feasible in the actual industry

Method used

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Embodiment Construction

[0028] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without one or more of these details. In other examples, some technical features known in the art are not described in order to avoid confusion with the present invention.

[0029] In order to thoroughly understand the present invention, detailed steps will be presented in the following description to illustrate how the present invention detects the topography of the wafer surface. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the semiconductor arts. Preferred embodiments of the present invention are described in detail below, however, the present invention may have other embodiments besides these detailed descriptions.

[0030]In the following paragraphs the invention is ...

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Abstract

The invention provides a wafer surface morphology detection method. The method comprises the following steps: 1, selecting a wafer of a plurality of dies with same whole relative surface morphologies; 2, selecting a first die, aligning the central position of a detection point array at the central position of the first die, and determining the first relative surface morphology of the first die by detecting the first absolute surface morphology of the first die; 3, selecting a second die, deviating the central position of the detection point array from the central position of the second die, and determining the second relative surface morphology of the second die by detecting the second absolute surface morphology of the second die; 4, determining the whole relative surface morphologies of the two dies by merging the first relative surface morphology and the second relative surface morphology; and 5, detecting partial absolute surface morphologies of other dies on the wafer, and obtaining the whole absolute surface morphologies of all the dies through the partial absolute surface morphologies and the whole relative surface morphologies. According to the invention, a "blind spot" problem generated by spaces between each two light spots can be avoided.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for detecting the surface topography of a wafer. Background technique [0002] Photolithography technology has been widely used in integrated circuit manufacturing process. This technology exposes through a photolithography system to transfer the designed mask pattern to the photoresist. The concepts of "mask" and "photoresist" are well known in the photolithography process: the mask is also called a photoresist, which is a substrate of film, plastic or glass with various functional patterns ( A template for photoresist, which is used for selective exposure of photoresist; photoresist is a colloidal liquid mixed with photosensitive compound, matrix resin and organic solvent. A change in chemical structure that changes the solubility characteristics in a certain solution. [0003] Since the lithography process determines the feature size of the final integrat...

Claims

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Application Information

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IPC IPC(8): G03F7/20G03F9/00
Inventor 王辉安辉
Owner SEMICON MFG INT (SHANGHAI) CORP
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