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Method for surface planarization in preparation process of semiconductor

A surface planarization and semiconductor technology, which is applied in semiconductor/solid-state device manufacturing, optomechanical equipment, micro-lithography exposure equipment, etc., can solve problems such as dwelling, and achieve good uniformity, low cost, and good effect

Active Publication Date: 2013-12-18
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

At present, CMOS devices can achieve mass production of 32nm or even 22nm, but the RF-CMOS process still stays at about 0.13μm

Method used

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  • Method for surface planarization in preparation process of semiconductor
  • Method for surface planarization in preparation process of semiconductor
  • Method for surface planarization in preparation process of semiconductor

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Embodiment Construction

[0021] Since the negative photoresist has the characteristic that exposure below the threshold E0 can be developed, but above the threshold E0 it cannot be developed. Therefore, the use of the anti-reflection layer can reduce the reflectivity of the substrate to a very low level, so even if the exposure energy is higher than E0, the actual effective exposure energy of the part on the anti-reflection layer is much lower than E0, so it will still be developed. In the area of ​​the anti-reflection layer, the exposure energy is still higher than E0, and the photoresist can be retained, so there is no need to use a photolithography mask, as long as the full exposure is performed, the pattern can be self-aligned according to the pattern of the front anti-reflection layer. .

[0022] The method for surface planarization in semiconductor preparation of the present invention combines the characteristics of the above-mentioned negative photoresist to carry out surface planarization in s...

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Abstract

The invention discloses a method for surface planarization in a preparation process of a semiconductor. After a material required to be patterned is deposited on a substrate, the method comprises the following steps of: depositing an antireflection material on the material required to be patterned; defining a pattern by using a photolithographic process, and etching the antireflection material and the material required to be patterned to form the pattern; performing spin coating on a negative photoresist until a stage is covered; performing direct exposure and development, and removing the negative photoresist on the antireflection material; and filling with an organic filling material to form a planarization surface. The method provided by the invention is particularly suitable for the planarization of a substrate which has a relatively small area on a relatively high area.

Description

technical field [0001] The invention relates to a method for surface planarization in the manufacture of semiconductors. Background technique [0002] With the continuous development of semiconductor manufacturing technology and the improvement of device integration, the critical dimensions of the device are continuously reduced, and the DOF (Depth of Focus) of the photolithography process is also continuously reduced. Therefore, the requirements for the flatness of the substrate are increasing. The higher the height, the slight step difference may lead to different degrees of defocus in areas of different heights, resulting in inaccurate imaging of graphics. [0003] At the same time, photoresist is a material that is transparent to the exposure wavelength, so it will show different reflectivity with different film thicknesses, which will lead to different critical dimensions caused by different exposure energies, which is usually called the swing curve phenomenon. . For ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02H01L21/027H01L21/31H01L21/314G03F7/00G03F7/20
Inventor 王雷
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP