Clock control device and system-on-chip comprising same

Abstract

The invention discloses a clock control device. The clock control device comprises a frequency dividing unit and a gating unit, wherein the frequency dividing unit is used for receiving a plurality of clock domain signals and dividing frequency of the clock domain signals on a system-on-chip to obtain a signal required by a functional module on the system-on-chip; the gating unit is used for gating the signal output by the frequency dividing unit and forms a bypass circuit, and the bypass circuit is used for outputting the clock frequency required by the functional module through the gating unit when an enabling signal port is tested to be low level or high level; and when an enabling signal port is tested to be high level or low level, the bypass unit outputs a preset signal. Clock signals with a plurality of frequencies are provided to a plurality of functional modules of the system-on-chip by generating high-frequency clock through an externally input crystal oscillator clock, dividing frequency of medium and high clocks and controlling the medium and high clocks; and the bypass unit is designed according to the requirement that the clock signals are required to be controllable in overall situation when the system-on-chip is tested, so the normal work of the system-on-chip and the overall controllability of the clock signals during test are ensured.

Description

technical field [0001] The present invention relates to the technical field of integrated circuits, in particular, the present invention relates to a clock control device and an on-chip system including the clock control device. Background technique [0002] System-on-chip is to form a complete electronic system on a semiconductor substrate, which is an inevitable trend in the development of application-specific integrated circuits. As a world-leading technology, system-on-chip has appeared as early as the 1990s. With the continuous development of Moore's Law in integrated circuit technology, system-on-chip design has developed into a mainstream technology. The ARM-based architecture is the mainstream of the current system-on-chip design, which includes the selection of ARM (Advanced RISC Machines, Advanced Reduced Instruction System Processor) processor core and AMBA bus protocol (Advanced controller Bus Architecture, advanced microprocessor bus architecture) . The system...

AI Technical Summary

Problems solved by technology

A single clock domain is difficult to meet the requirements of a system-on-chip with complex functions. Therefore, the system-on-chip needs to provide multiple clock domains. Further considering the low power consumption requirements of the system-on-chip, the system-on-chip needs to divide the frequency of the clock domain. Therefore, the system-on-chip The management of the clock signal puts forward very high requirements, and any design error will cause the chip to not work properly

[0003] In the prior art, a functional module of a system on a chip, such as an embedded central processing unit and / or an APB bridge module, has no bus clock, and can only sense the bus clock by detecting the high level of the enable signal at the rising edge of the main clock Whether the rising edge is coming, so the system clock control device must ensure that the timing relationship between the main clock of each module and the enable signal is correct, otherwise the functional modules of the system on chip will not work normally

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