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Method for distributing shared buffer of multi-core processor

A multi-core processor and shared cache technology, applied in the direction of memory address/allocation/relocation, electrical digital data processing, instruments, etc., to achieve the effect of low overhead and minimal impact

Inactive Publication Date: 2015-05-20
HUAZHONG UNIV OF SCI & TECH
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It is only used for research in academia and has not been implemented on real machines

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[0043] Run two applications separately on a dual-core processor. When the application is running, it reads the hardware counter to record the missing gap, and converts the missing gap data into cumulative missing times-cumulative access times. When the amount of data is enough to represent the behavior of the program, here we take the number of 64M cache accesses and perform linear fitting on the data to obtain two parameters of the model, the fractal dimension and the intercept. By substituting the two parameters into the fractal prediction model, the cache miss rate of the program can be obtained when the program runs at a certain cache size, that is, the cache miss rate curve. In order to achieve the lowest average cache miss rate, the partition point that minimizes the average cache miss rate is used to allocate the cache.

[0044] From the above analysis, it can be found that the method of the present invention isolates the program to use the cache area, and different pro...

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Abstract

The invention provides a method for distributing a shared buffer of a multi-core processor. The method is executed by steps of forecasting miss rate curves of two application programs, acquiring a corresponding minimum average miss rate based on the forecasting result of the two miss rate curves, then further making a buffer distribution strategy according to a dividing point of the acquired minimum average miss rate and finally realizing the shared buffer management in a full-software manner. The average performance of a shared buffer system is effectively improved by the method disclosed by the invention.

Description

technical field [0001] The invention belongs to the field of computer software, and in particular relates to a multi-core CPU shared cache allocation method. Background technique [0002] As the processor frequency gradually approaches the bottleneck, architecture researchers and the industry have turned to the multi-core field, using multiple processor cores to improve the overall performance of the computer system, thereby alleviating the computer system's demand for high frequency. There is a layer of cache structure between the processor core and the memory, and its read and write speed is faster than that of the memory. The data is cached in the CPU cache. When the CPU reads and writes data, it can avoid accessing data from the slower memory and operate the data directly from the cache, thereby improving the performance of the computer system. [0003] There are two cache design methods in the current market computer architecture, shared cache and private cache. Priva...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/08G06F15/167G06F12/084
Inventor 金海喻之斌贺露露
Owner HUAZHONG UNIV OF SCI & TECH
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