TFT array substrate and manufacturing method thereof

Abstract

The invention relates to display technology field and especially relate to a TFT array substrate. The TFT array substrate at least comprises: a substrate possessing a first surface, a first TFT, a second TFT, a storage capacitor and a gate insulating layer, wherein the first TFT, the second TFT, the storage capacitor and the gate insulating layer are formed on the first surface of the substrate. The first TFT and the second TFT are the TFT with different types. The substrate comprises: a first area, a second area and a third area. The first TFT is located in the first area. The second TFT is located in the second area. The storage capacitor is located in the third area. The first TFT comprises: a first grid electrode, a first source electrode, a first drain electrode and a first channel region. The second TFT comprises: a second grid electrode, a second source electrode, a second drain electrode, a second channel region and a low-doped source-drain area. The storage capacitor comprises: a polycrystalline-silicon high-doped area and an electrode.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a thin film transistor array substrate and a manufacturing method thereof. Background technique [0002] Thin film transistors (TFTs) are widely used in flat panel display devices, such as the most common liquid crystal displays (LCDs) and organic light emitting display devices (AMOLEDs). [0003] In the currently sold flat panel display products based on TFT technology, the TFT devices used basically fall into two categories: amorphous silicon thin film transistors (a-Si TFTs) and polysilicon thin film transistors. For the latter, according to the different manufacturing processes, it can be divided into low-temperature polysilicon thin-film transistors (LTPS TFT) and high-temperature polysilicon thin-film transistors (HTPS TFT), which are suitable for small and medium-sized display devices and micro-sized display devices (such as projection image sources) )Wait. [0004] Com...

AI Technical Summary

Problems solved by technology

[0005] Compared with amorphous silicon thin film transistors, the manufacturing process of low temperature polysilicon thin film transistors is more complicated. Generally speaking, amorphous silicon thin film transistors use 4 or 5 mask mask photolithography processes, while low temperature polysilicon thin film transistors usually need to use 9 masks. Mask lithography process, the increase in process complexity increases the production cost of display devices driven by low-temperature polysilicon thin-film transistors, and reduces the yield rate, which affects the competitiveness of display devices driven by low-temperature polysilicon thin-film transistors

Images