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Method for manufacturing three-dimensional semiconductor storage device

A memory device and semiconductor technology, applied in the field of microelectronics, can solve the problems that restrict the high-density vertical integration of three-dimensional resistance (phase) change units, and the etching process is difficult to achieve a large through-hole depth ratio.

Active Publication Date: 2012-07-04
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0007] In the process of realizing the present invention, the inventor realized that the prior art has the following defects: in the process of preparing a three-dimensional semiconductor memory device, it is difficult for the existing etching process to achieve a large through-hole aspect ratio, which will seriously restrict the three-dimensional resistance ( High Density Vertical Integration of Phase) Change Units

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  • Method for manufacturing three-dimensional semiconductor storage device
  • Method for manufacturing three-dimensional semiconductor storage device
  • Method for manufacturing three-dimensional semiconductor storage device

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Embodiment Construction

[0038] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0039] The invention discloses a method for preparing a three-dimensional semiconductor storage device, comprising: step A: preparing an access transistor on a substrate. Step B: forming a first sub-memory array composed of a plurality of vertical ring-shaped resistive switching units on the access transistor, including: alternately depositing multiple layers of isolation layers and sacrificial layers; etching through holes to define vertical ring-shaped resistive switching units The lower electrode area is connected downward to the drain of the access transistor; the lower electrode of the first sub-memory array is deposited in the through hole area; and the insulating medium layer is deposited. Step C: forming a second ...

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Abstract

The invention discloses a method for manufacturing a three-dimensional semiconductor storage device. According to the method, the whole storage array is converted into a plurality of sub storage arrays, a mode of etching a lower electrode through hole of a multilayer resistance variation unit structure at a time is changed into a mode of etching through holes of all the sub storage arrays respectively, and a through hole metal material is filled back to ensure that all the sub storage arrays are connected with one another. By the scheme, the process complexity and difficulty of an etching process in the high-density integration process are obviously reduced, and the quantity of integration layers in a resistance variation unit of the whole storage array can be increased.

Description

technical field [0001] The invention relates to the technical field of microelectronics, in particular to a method for preparing a three-dimensional semiconductor storage device. Background technique [0002] Semiconductor storage technology is one of the key technologies in the field of microelectronics technology. As information technology shifts from network and computing to storage as the core, the research on storage technology has become an important direction of information technology research. The current research on storage technology mainly focuses on the research on high-density, high-performance non-volatile flash memory technology. With the continuous shrinking of the device size, the traditional FLASH technology encounters more and more serious technical difficulties in the process of realizing the variable ratio, such as crosstalk, slow writing speed, etc., and it is difficult to adapt to the requirements of the storage technology development of the post-20nm...

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Application Information

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IPC IPC(8): H01L21/8239H01L21/768H01L45/00
CPCH01L29/7926H01L27/249H01L27/0688H01L27/11582H01L27/2436H01L45/16H01L45/1206H01L27/101H01L45/04H01L45/14H10B63/34H10B63/845H10B63/30H10N70/823H10N70/231H10N70/20H10N70/881H10N70/8836H10N70/8828H10N70/8833H10N70/011H10N70/00H10N70/253
Inventor 霍宗亮刘明
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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