Method and device for filtering high-speed sampling signal in real time based on digital signal processor (DSP)

A high-speed sampling and signal technology, applied in the direction of impedance network, adaptive network, electrical components, etc., can solve the problems of increased calculation amount, extended operation time, and increased storage space, and achieve the goal of reducing the amount of calculation and shortening the operation delay Effect

Inactive Publication Date: 2012-07-04
POTEVIO INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In DSP, the larger the data block, the greater the delay, and the corresponding increase in the required storage space; although the reduction of the data block can effectively reduce the delay and the required storage space, it needs to pay the increased amount of calculation. The cost affects the real-time processing
[0006] In summary, the FPGA platform or ASIC platform using digital intermediate frequency filtering, and the DSP with low performance and small storage capacity have the problem of prolonging the operation time or large amount of calculation.

Method used

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  • Method and device for filtering high-speed sampling signal in real time based on digital signal processor (DSP)
  • Method and device for filtering high-speed sampling signal in real time based on digital signal processor (DSP)
  • Method and device for filtering high-speed sampling signal in real time based on digital signal processor (DSP)

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Embodiment 1

[0038] See attached figure 2 It is a schematic structural diagram of a real-time filtering device for high-speed sampling signals based on a DSP platform. Direct memory (DMA) controls the reception and ping-pong storage of the intermediate frequency signal from the ADC, and starts a digital intermediate frequency filtering process after completing a ping buffer storage, and then transfers to the pang buffer to continue data storage, and then restarts after completion A digital intermediate frequency filtering process. After the ping buffer stores the data, start the pang buffer to store the data, and at the same time start the data intermediate frequency filtering process. Data IF filtering is performed intermittently. The filter processing time of the data is shorter than the storage time of the ping buffer or pong buffer data, so that the above process can be guaranteed to proceed normally. If the filtering processing time of the data by the filter is greater than or equ...

Embodiment 2

[0046] See attached Figure 4 It is a schematic diagram of the device structure for real-time filtering of high-speed sampling signals, including:

[0047] The ping-pong buffer 401 is used to store the data of a frame of high-speed sampling signal after the first division;

[0048] Segmentation module 402, is used for carrying out the first division to the data of one frame high-speed adopting signal, divides the data in the ping-pong buffer again to obtain the data element

[0049] The filtering module 403 is used to filter the data micro-elements output by the segmentation module, and use the final state after filtering processing of each data micro-element as the initial state during the next data micro-element filtering processing, and continuously output the filtered data micro-elements For each data element: further use the final state of the data element after the convolution operation of the buffer after the filtering process as the initial state of the data element o...

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Abstract

The invention discloses a method for filtering a high-speed sampling signal in real time based on a digital signal processor (DSP). The method comprises the following steps of: partitioning data of a frame of high-speed sampling signal for the first time; storing the data which are partitioned for the first time into a ping-pong buffer, re-partitioning the data in the ping-pong buffer to obtain data micro elements, and sequentially filtering the data micro elements; by taking a final state of each of the filtered data micro elements as an initial state of the next data micro element during filtration, continuously outputting the filtered data micro elements; and according to group delay, generating a string of zero values after all data micro elements are filtered, and outputting trailing data. The invention also discloses a device for filtering the high-speed sampling signal in real time. By the embodiment of the invention, the memory usage amount of the DSP can be reduced, computation amount is reduced, and operation delay is shortened.

Description

technical field [0001] The present invention relates to the field of communication technology, more specifically, to a method and device for real-time filtering of high-speed sampling signals based on DSP. Background technique [0002] The real-time filtering of high-speed sampling signals adopts the following method, that is, the digital intermediate frequency filter processes high-speed sampling information in a programmable gate array (FPGA) platform or an application-specific integrated circuit (ASIC) platform. Or use a digital signal processor (DSP) with high performance and large storage capacity to realize real-time filtering of high-speed sampling signals. [0003] In the digital IF filter structure, two storage areas are opened when receiving data, one storage area is called a ping buffer, and the other storage area is called a pong buffer. The received data is first stored in the ping buffer for processing, and then the processed data is stored in the pong buffer....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03H21/00
Inventor 吴宁杜显丰齐欢孟杰
Owner POTEVIO INFORMATION TECH CO LTD
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