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Dual-gate display panel with high display quality

A display quality and display panel technology, applied in static indicators, nonlinear optics, instruments, etc., can solve problems such as short circuit, loss of panel aperture ratio, etc.

Inactive Publication Date: 2012-07-11
CENTURY DISPLAY (SHENZHEN) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] But for the technology provided above, it is observed from the circuit layout, such as image 3 As shown, the scanning lines 20 and the common electrode lines 22 belong to the same metal layer and are very close to each other. Therefore, if particles accidentally fall into the panel during the manufacturing process, it is easy to cause the scanning lines 20 and the common electrode lines to be separated after the process is completed. Line 22 is short-circuited, which in turn leads to problems such as horizontal dark lines or bright lines on the panel display. In addition, because the two electrode layers 24 on the adjacent scanning line 20 and the adjacent data line 18 are respectively two The pixel display area of ​​each pixel, and the common electrode line 22 occupies the area of ​​the light-transmitting area of ​​the electrode layer 24, so that the light-transmitting area of ​​the electrode layer 24 minus the metal layer forming the common electrode line 22 becomes less, and then makes the entire panel less. loss of opening ratio

Method used

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  • Dual-gate display panel with high display quality
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  • Dual-gate display panel with high display quality

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Embodiment Construction

[0018] The main design of the present invention is to use a metal layer to form the source, drain, data lines and common electrode lines of transistors in the same process, and place the common electrode lines between transistors in two adjacent rows. First, please refer to Figure 4 . The equivalent circuit of the liquid crystal display panel of the present invention includes a plurality of parallel scanning lines 28 and a plurality of parallel data lines 26, the scanning lines 28 include a first scanning line 282 and a second scanning line 284, the data lines 26 and the scanning lines The lines 28 are perpendicular to each other, and the data lines 26 include a first data line 262 .

[0019] The liquid crystal display panel of the present invention also includes a plurality of double-gate pixel units 32 arranged in a matrix, and is formed by connecting data lines 26, scanning lines 28 and common electrode lines 30 to each other. The electrode lines 30 intersect vertically, ...

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Abstract

The invention provides a dual-gate display panel with high display quality. The dual-gate display panel comprises a data line, scan lines, and a plurality of dual-gate pixel units connected with common electrode lines, wherein each dual-gate pixel unit comprises a first pixel and a second pixel which are respectively connected with a first scan line and a second scan line and share one data line; each common electrode line is arranged between the dual-gate pixel units in two adjacent rows; the first pixel and the second pixel are located on two different sides of the first scan line and the second scan line; the data line is used for transmitting data signals to the pixels; and the scan lines control the pixels to receive the data signals. The dual-gate display panel provided by the invention can be used for improving the pixel aperture ratio, and reducing the possibility of short circuit between the scan lines and the common electrode line.

Description

【Technical field】 [0001] The present invention relates to a display panel, in particular to a double-gate display panel with high display quality. 【Background technique】 [0002] see figure 1 , in a traditional active matrix liquid crystal display (LCD), each pixel of its single-gate circuit structure has a thin-film transistor (TFT) 10, its gate is connected to the scanning line 12 in the horizontal direction, and its source is connected to the vertical scanning line. The drains of the data lines 14 in the direction are connected to the pixel electrodes, and the thin film transistors 10 in adjacent rows are respectively connected to the data lines 14 . [0003] The basic operation of this traditional circuit architecture is introduced below. On the same scanning line 12 in the horizontal direction, the gates of all thin film transistors 10 are connected together, so the applied voltage is linked. If a sufficiently large positive voltage is applied to the scanning line, al...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G02F1/1362G02F1/1368G02F1/133G09G3/36
Inventor 柳智忠
Owner CENTURY DISPLAY (SHENZHEN) CO LTD
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