Band gap reference apparatus and method

Abstract

Structure and methods for a compensated bandgap reference circuit. A first integrated circuit die having a first bandgap reference circuit with a non-zero temperature coefficient; and having a first output reference signal is provided, a second integrated circuit die having a second bandgap reference circuit with a non-zero temperature coefficient that is of opposite polarity from the temperature coefficient of the first bandgap reference circuit, and having a second output reference signal is provided; an adder circuit disposed on at least one of the first and second integrated circuit dies combines the first and second output reference signals, and outputs a combined reference signal; and connectors for connecting the first and second output signals to the adder circuit are provided. Methods are disclosed for pairing integrated circuit dies with bandgap reference circuits and coupling the dies to form temperature compensated signals.

Description

technical field [0001] The field relates to the field of electronic circuits, and more particularly, to bandgap reference devices and methods. Background technique [0002] A common requirement for advanced electronic circuits and especially for circuits fabricated as integrated circuits ("ICs") in semiconductor manufacturing processes is the use of bandgap reference circuits. A bandgap reference circuit provides a current reference, or a voltage reference, for ideal temperature and independent process variation. The bandgap reference is designed to have a zero temperature coefficient ("TC"). Bandgap reference circuits are an essential component in many analog and mixed-signal circuits where fixed voltage and current references are required. In order to ensure a high-precision reference through a bandgap reference circuit in an integrated circuit device fabricated in a semiconductor manufacturing process, a test measurement and device trimming procedure is generally perfor...

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Problems solved by technology

However, the use of trimming techniques requires additional pads, which also reduces the available silicon area and, as mentioned above, adds steps to the fabrication process and increases the cost of the fabrication process.

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