Address decoder of current sharing-type memory

An address decoder and current sharing technology, applied in the field of address decoders, can solve problems such as increased power consumption, and achieve the effects of circuit stability, fast working speed, and enhanced drive capability

Active Publication Date: 2012-08-15
苏州迅芯微电子有限公司
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

Increasing the operating current of the emitter follower can reduce the fall time and reduce the

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  • Address decoder of current sharing-type memory
  • Address decoder of current sharing-type memory
  • Address decoder of current sharing-type memory

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[0027] In order to make the objectives, technical solutions, and advantages of the present invention clearer, the following further describes the present invention in detail in conjunction with specific embodiments and with reference to the accompanying drawings.

[0028] It should be noted that the specific embodiment of the present invention uses a negative power supply for power supply, the upper rail of the power supply is grounded, and the lower rail is the negative power supply VEE. Of course, a positive power supply can also be used. In this case, the upper rail of the power supply is the power supply VCC, and the lower rail is grounded.

[0029] The structure of an embodiment of the low-power high-speed address decoding circuit of the present invention is as follows figure 2 As shown, the address decoding unit 100 and the driving unit 200 are included.

[0030] The address decoding unit 100 adopts an ECL NOR structure. N differential address A 1 A 2 ...A N Respectively with...

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Abstract

The invention discloses an address decoder of a current sharing-type memory. The address decoder comprises multiple address decoding circuits with a current sharing port, wherein the current sharing ports of each address decoding circuit are connected together to share driving current, so that the driving capacity of the address decoder is enhanced. The address decoding circuit consists of an address decoding unit and a driving unit, wherein the address decoding unit is used for decoding a memory address and outputting decoding signals with a differential form; and the driving unit uses an active pull-down circuit, amplifies the decoding signal, then outputs single-ended driving signals, provides pull-down current to drive an equivalent capacitor formed by memory arrays, and provides a current sharing port. The address decoder has the advantages that the driving capacity of the decoding circuit is enhanced by utilizing the active pull-down circuit, and the current sharing port is provided. The address decoder has the characteristics of simple circuit structure, stable circuit, low power consumption, high working speed, strong driving capacity, and the like.

Description

technical field [0001] The invention relates to the technical field of integrated circuit memory design, in particular to an address decoder of a current sharing type memory. Background technique [0002] Semiconductor memory generally consists of address decoders, memory arrays and sense amplifiers. The address decoder is composed of multiple address decoding circuits. For a memory with an N-bit address, 2 N an address decoding circuit. As memory capacity increases, storage arrays become larger and larger. For the address decoding circuit, the storage array is equivalent to a capacitor. As the storage array increases, the equivalent capacitance also increases gradually. The address decoding circuit generally uses an emitter follower to drive the memory array, such as figure 1 shown. However, emitter follower has a serious problem when driving load capacitance. As the load capacitance increases, the falling edge of the output signal waveform of the emitter follower in...

Claims

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Application Information

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IPC IPC(8): G11C8/10
Inventor 刘新宇陈建武吴旦昱周磊武锦金智
Owner 苏州迅芯微电子有限公司
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