Reducing plating stub reflections in a chip package using resistive coupling

Abstract

Improving signal quality in a high-frequency chip package by resistively connecting an open-ended plating stub to ground. One embodiment provides a multi-layer substrate for interfacing a chip with a printed circuit board. A conductive first layer provides a chip mounting location. A signal interconnect is spaced from the chip mounting location, and a signal trace extends from near the chip mounting location to the signal interconnect. A chip mounted at the chip mounting location may be connected to the signal trace by wirebonding. A plating stub extends from the signal interconnect, such as to a periphery of the substrate. A resistor is used to resistively couple the plating stub to a ground layer.

Description

technical field [0001] The present invention relates to signal quality in chip packages, and more particularly to reducing stub reflections and resonance in high frequency chip packages. Background technique [0002] An integrated circuit (IC) (also commonly referred to as a "microchip" or "chip") is an electronic circuit comprising miniature semiconductor devices formed in a semiconductor substrate. Many copies of a chip may be formed on a large semiconductor wafer and then diced into individual chips, which may be interchangeably referred to in the art as "die chips" or "die." However, semiconductor materials such as silicon are often fragile, and chips made in this way are fragile. Accordingly, the individual die chips are typically packaged on a carrier known as a "chip package" or simply a "package". The chip package protects the chip and provides an electrical and mechanical interface between the chip and a printed circuit board (PCB), such as a computer motherboard....

AI Technical Summary

Problems solved by technology

Plating stubs can hamper the signal performance of the package if left intact due to reflections in the open trace at the high operating frequencies of modern chips

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