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A kind of JFET device and its forming method

A device and drift region technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., to achieve high stability, high process stability, and reduce the effect of drift region resistance

Active Publication Date: 2015-09-02
ADVANCED SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

There are few domestic high-voltage BCD process platforms above 500V, and there are few reports on integrated high-voltage JFET devices

Method used

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  • A kind of JFET device and its forming method
  • A kind of JFET device and its forming method
  • A kind of JFET device and its forming method

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Embodiment Construction

[0045] The JFET device provided by the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. Advantages and features of the present invention will be apparent from the following description and claims. It should be noted that all the drawings are in a very simplified form, and are only used for the purpose of conveniently and clearly assisting in describing the embodiments of the present invention.

[0046] Please refer to figure 1 , provide a semiconductor substrate 1, the semiconductor substrate 1 is a P-substrate, implant phosphorus (P), adopt N-well photoresist lines 2 with unequal widths and unequal intervals, and carry out thermal advancement, such as figure 2 As shown, after thermal advancement, a linearly doped N-well drift region 3 whose concentration gradually becomes lighter from the drain to the source (see below for the drain and source) is formed, and an oxide layer 4 is thermally gr...

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Abstract

The invention discloses a JFET and a producing method thereof. The producing method includes performing linear optimization to drift region transverse concentration, and combining a field oxygen structure with a certain angle with a step filed plate structure; accordingly, maximum drain-source voltage (V (BR)DS) is obtained, simultaneously, the drift region resistance is reduced, and saturation drain current (IDSS) is increased. And further, a channel region of the JFET is formed by injection and / or thermal propulsion, as the injection and thermal propulsion technology has high stability, the pinch-off voltage VP also has high stability.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a JFET device. Background technique [0002] Integrated high-voltage lateral JFET (Junction Field Effect Transistor) device refers to the junction field effect that the drain, source and gate are located on the surface, have a lateral channel, conduction current flows laterally and can be used for high voltage (300V to 1200V) Tube. In the high-voltage chip (HVIC), the startup circuit (Start up) and the constant current source module can be easily formed by using the integrated high-voltage lateral JFET, which is a very practical high-voltage integrated device. In the high-voltage lateral BCD process platform, how to realize the integration of high-performance high-voltage JFETs is one of the issues that device designers should pay attention to. [0003] For JFET, its main parameters include pinch-off voltage VP, saturated drain current IDSS, maximum drain-source ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/36H01L29/40H01L29/808H01L21/28H01L21/762H01L21/337
Inventor 吕宇强杨海波
Owner ADVANCED SEMICON MFG CO LTD