GPU (Graphics Processing Unit) acceleration method used for hierarchical searching motion estimation

A layered search and motion estimation technology, applied in the field of video processing, can solve problems such as unsatisfactory needs and limited search range, and achieve the effects of reducing communication, avoiding thread idling, and improving speed

Active Publication Date: 2012-08-22
PEKING UNIV SHENZHEN GRADUATE SCHOOL
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Problems solved by technology

[0005] After searching the existing technical literature, it is found that among the existing methods of using GPU to accelerate the motion estimation algorithm, only the method of accelerating the motion estimation algorithm f...

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  • GPU (Graphics Processing Unit) acceleration method used for hierarchical searching motion estimation
  • GPU (Graphics Processing Unit) acceleration method used for hierarchical searching motion estimation
  • GPU (Graphics Processing Unit) acceleration method used for hierarchical searching motion estimation

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Embodiment Construction

[0034] The present invention will be described in detail below in conjunction with the accompanying drawings and embodiments. This embodiment is only an embodiment of the present invention but not all embodiments.

[0035] Layered search motion estimation is performed on video sequences with resolutions of 1920·1080. The size of the search image block on the original image layer is 8·8. The search range should cover an area centered on the current block with a width and height of 256 pixels. A thread block of the used GPU can have 512 threads, and the warp size in the thread block is 16 threads.

[0036] In this application scenario, the following embodiment can be used to divide three image layers: the first image layer is the original image layer, the search image block size is 8.8, and the search area is an 8.8 area centered on the current block; The second image layer is the 960·540 resolution image downsampled from the original image, the search image block size is 8·8, ...

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Abstract

The invention discloses a hierarchical searching motion estimation method used by utilizing GPU (Graphics Processing Unit) parallel computing capability acceleration, and the method comprises the following steps: generating images of different image layers in a hierarchical searching algorithm; self-adaptively carrying out threading distribution; carrying out SAD computation on each search image block at each search point in parallel; and utilizing a CPU (Central Processing Unit) to cooperatively look for the smallest SAD in parallel. The self-adaptive threading distribution scheme provided by the invention can satisfy the requirement of the resolution ratios of different searched images and the size of a searching area, the image downsapling is processed by the GPU in parallel to obtain better acceleration speed and reduce data communication between the CPU and the GPU, and the GPU can be effectively prevented from idling with a smallest SAD value lookup method cooperatively carried out by the GPU/CPU.

Description

technical field [0001] The invention relates to a motion estimation method in the field of video processing, in particular to a layered search motion estimation acceleration method using a GPU to assist a CPU. technical background [0002] Motion estimation is an important technology in the field of video processing, and plays an important role in applications such as hybrid video coding based on block matching, motion detection, and object tracking. The motion estimation algorithm calculates the SAD values ​​of all or part of the possible search points within the search range for each block, and obtains the best or near-best motion vector by finding the smallest SAD value. The full search motion estimation algorithm calculates the SAD of each possible point within the search range, and finally obtains the best motion vector. The full search motion estimation algorithm has a high performance in operation. Therefore, there are many fast search algorithms, such as three-step...

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Application Information

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IPC IPC(8): H04N7/26H04N7/46H04N5/14H04N19/53
Inventor 王振宇王荣刚董胜富高文
Owner PEKING UNIV SHENZHEN GRADUATE SCHOOL
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