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Integrated passive device and manufacture method thereof

A technology that integrates passive devices and manufacturing methods. It is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc. It can solve the problems that cannot meet the application requirements and the range of interconnection capacitance is small, so as to achieve easy adjustment and improve the electric capacity. Effect of capacity, area improvement

Active Publication Date: 2012-10-24
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The range of the capacitance value of the interconnect capacitance of the integrated passive device in the prior art is small, which cannot meet the requirements of the application

Method used

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  • Integrated passive device and manufacture method thereof
  • Integrated passive device and manufacture method thereof
  • Integrated passive device and manufacture method thereof

Examples

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Embodiment Construction

[0041] Since the existing interconnection capacitor is a parallel plate capacitor, the interconnection capacitor includes a metal layer-insulator layer-metal layer parallel to the surface of the semiconductor substrate, thereby forming an interconnection capacitor vertically conducted between chips.

[0042] Please combine figure 1 When the capacitance value of the capacitor to be formed is large, the facing area between the first electrode plate and the second electrode plate needs to be increased, but due to the limited area of ​​the semiconductor substrate, the range of the capacitance value of the capacitor is limited. Moreover, since the thickness of the insulating layer is generally greater than 500 angstroms, the capacitance of the capacitor is relatively large.

[0043] In order to solve the above problems, the embodiment of the present invention proposes a manufacturing method for integrated passive devices, please combine figure 2 Shown is a schematic flow chart of...

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Abstract

An embodiment of the invention provides an integrated passive device and a manufacture method thereof. The method includes: providing a semi-conductor substrate; forming a first electric conducting layer in the semi-conductor substrate; forming interconnection holes and a capacitance hole in the semi-conductor substrate, wherein the capacitance hole is adjacent to the first electric conducting layer; forming interconnection plugs in the interconnecting holes; forming an insulation layer on the lateral wall and the bottom of the capacitance hole; and forming a second electric conducting layer in the capacitance hole. The second electric conducting layer, the insulation layer and the first electric conducting layer form a capacitor. The integrated passive device and the manufacture method increase a capacitance range of interconnecting capacitors connected vertically between chips and meet application requirements.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an integrated passive device including capacitors and a manufacturing method thereof. Background technique [0002] Through-silicon via technology (TSV, Through-Silicon-Via) is the latest technology to realize the interconnection between chips by making vertical conduction between chips. Different from the previous IC package bonding and overlay technology using bumps, TSV technology can maximize the density of chips stacked in three dimensions, minimize the size of the chip, and greatly improve the performance of chip speed and low power consumption. [0003] Existing TSV technology typically forms integrated passive devices on the semiconductor substrate. The integrated passive device includes: interconnect capacitors and interconnect plugs. The manufacturing method of the interconnection plug includes: forming an interconnection hole on the surface of one side of the ...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L29/92
Inventor 洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP
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