Three-dimensional spiral inductor and forming method thereof

Abstract

The invention provides a three-dimensional spiral inductor and a forming method thereof. The three-dimensional spiral inductor comprises a substrate, a plurality of interconnection through holes, a plurality of first metal interconnection lines and a plurality of second metal interconnection lines, wherein the substrate comprises a first surface and a second surface, the plurality of intercommunicated through holes are formed in the substrate in a penetration way, the first metal interconnection lines are located on the first surface of the substrate, the second metal interconnection lines are located on the second surface of the substrate, and the first metal interconnection lines, the second metal interconnection lines and the interconnection through holes constitute the three-dimensional spiral inductor. The three-dimensional spiral inductor disclosed by the embodiment of the invention is large in intermediate area, the area of the three-dimensional spiral inductor on the substrate is only the sum of the area of the first metal interconnection lines and the area of the second metal interconnection lines, the distance among the first metal interconnection lines and the distance among the second metal interconnection liens can be extremely small, so that the area of the inductor on the substrate can be reduced largely; in addition, the three-dimensional spiral inductor is located in the substrate and thus has no influence on other devices forming on the surfaces of the substrate, and thus, the space utilization rate is increased; and the process provided by the invention is compatible with the prior art.

Description

technical field [0001] The invention relates to the field of manufacturing three-dimensional spiral passive devices, in particular to a three-dimensional spiral inductor and a forming method thereof. Background technique [0002] With the continuous development of semiconductor technology, the size of semiconductor devices is constantly shrinking, but it is always a big problem to integrate high-performance passive devices such as capacitors and inductors and active semiconductor devices such as MOS transistors into chips. Ideally, the capacitors and inductors are integrated on the same substrate with other active semiconductor devices using conventional semiconductor manufacturing processes and processes. Compared with the feature size, the inductor and capacitor are relatively large in volume and are not easy to be integrated on the substrate with other active semiconductor devices at the same time. [0003] The inductance formed on the semiconductor substrate in the prio...

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Problems solved by technology

However, the Q value of the single-layer planar spiral inductor is often not high, and the area occupied by the planar spiral inductor is relatively large. In order to improve the Q value of the inductor, the US Patent Document No. US6429504B1 discloses a multilayer spiral inductor phase The inductance with high Q value formed in series forms a planar spiral inductor in the multi-layer interlayer dielectric layer on the semiconductor substrate, and the planar spiral inductors of each layer are connected in series

But this will increase the process, and the device cannot be formed in the interlayer dielectric layer on the corresponding semiconductor substrate, and the area of ​​the semiconductor substrate occupied by the formed inductor is still large

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