Class D audio power amplifier for noise suppression and audio signal processing method thereof
A technology for audio power and noise suppression, applied to amplifiers, amplifiers with semiconductor devices/discharge tubes, improved amplifiers to reduce noise effects, etc., can solve problems such as increased noise on and off switches, and reduce zero-crossing distortion and Effect of crosstalk noise and suppression of switching noise
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Embodiment 1
[0030] like image 3 As shown, according to a specific embodiment of the class D audio power amplifier of the present invention, the class D audio power amplifier includes an integrator 20, a comparator, a driver, a power switching element, and a feedback network. The class D audio power amplifier also includes a voltage-controlled delay circuit 5, which is used to control the delay of the signal so as to suppress the crosstalk noise and switching noise of the system.
[0031] The input terminal of the voltage-controlled time-delay circuit 5 inputs the square wave CLK as the reference wave, the control terminal control of the voltage-controlled time-delay circuit 5 inputs the control signal, and the output terminal of the voltage-controlled time-delay circuit 5 outputs a delayed square wave. Wave is a delayed square wave CLK. The square wave is input to the first reference wave input end of the integrator 20 , and the delayed square wave is input to the second reference wave ...
Embodiment 2
[0047] like Image 6 As shown, the circuit structure of this embodiment is basically the same as that of Embodiment 1, the difference is that the input terminal of the voltage-controlled delay circuit 5 inputs a triangular wave as a reference wave, and the control terminal control input of the voltage-controlled delay circuit 5 controls signal, the output end of the voltage-controlled delay circuit 5 outputs a delayed triangular wave, and the delayed triangular wave is a delayed triangular wave; the triangular wave is input to the inverting input of the first comparator 30, and the delayed square wave is input to the second comparator The inverting input end of 31; The first output end of integrator 20 is connected with the noninverting input end of first comparator 30, and the second output end of integrator 20 is connected with the noninverting input end of second comparator 31;
Embodiment 3
[0049] like Figure 7 As shown, the circuit structure of this embodiment is basically the same as that of Embodiment 1, the difference is that the input end of the voltage-controlled delay circuit 5 is connected to the output end of the first comparator 30, and the control of the voltage-controlled delay circuit 5 The control signal is input to the terminal control, the output terminal of the voltage-controlled delay circuit 5 is connected to the input terminal of the first driver 40 ; the output terminal of the second comparator 31 is connected to the input terminal of the second driver 41 .
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