Multiple real-time reconfiguration adaptor used in test of field-programmable gate array device

Abstract

The invention discloses a multiple real-time reconfiguration adaptor used in a test of a field-programmable gate array device. The multiple real-time reconfiguration adaptor comprises a development support board and a configuration test board, wherein the development support board is used for downloading a configuration file into a configuration memory array through a JTAG (joint test action group) interface to be stored up, and the configuration file is generated after a programmable logic resource of the field-programmable gate array device is subjected to programming design; the configuration test board comprises the configuration memory array for storing the configuration file generated by the development support board, a complex programmable logic device for automatically controlling the switch of configuration memories for the reconfiguration of the field-programmable gate array device, and a field-programmable gate array device socket for connecting the field-programmable gate array device with the configuration test board; the configuration memory array is connected between the complex programmable logic device and the field-programmable gate array device socket; and the output control end of the complex programmable logic device is connected with control ends of the configuration memories in the configuration memory array, and is used for controlling the switch of the configuration memories.

Description

technical field [0001] The invention relates to the technical field of integrated circuit testing, in particular to a multiple real-time reconfiguration adapter for field programmable gate array device testing. Background technique [0002] In general, Static Random Access Memory (SRAM) type Field Programmable Gate Array devices (Field Programmable Gate Array——FPGA) has the characteristics of being volatile when power off. Before testing the field programmable gate array device, it is necessary to configure the logic function circuit of the internal resources of the field programmable gate array device, and configure the device through the manufacturer's supporting development software. Programming and configuration program download, programming and downloading are all completed under the Windows operating system, while the workstations of some test equipment are Linux operating systems, and the operation of the software environment has a corresponding relationship with the ...

AI Technical Summary

Problems solved by technology

[0002] In general, Static Random Access Memory (SRAM) type Field Programmable Gate Array devices (Field Programmable Gate Array——FPGA) has the characteristics of being volatile when power off. Before testing the field programmable gate array device, it is necessary to configure the logic function circuit of the internal resources of the field programmable gate array device, and configure the device through the manufacturer's supporting development software. Programming and configuration program download, programming and downloading are all completed under the Windows operating system, while the workstations of some test equipment are Linux operating systems, and the operation of the software environment has a corresponding relationship with the system hardware, and field programmable gate array devices cannot be run It can be configured and downloaded by the development software, and the simple test sub-board can no longer test the field programmable gate array device; because the test of different components inside the field programmable gate array device requires different configuration logic circuits, each test Logic resources or an AC / DC parameter need to be programmed and configured once before testing, so to conduct a complete test on the field programmable gate array device, it is necessary to repeatedly program and configure the field programmable gate array device; and the existing The technology is to switch the control through the manual dial switch. The test process in this mode of operation takes a long time, the test efficiency is low, and the manual operation mode is also more inconvenient.

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