Tri-polycrystal strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device and preparation method
A technology for integrating devices and devices, which is applied in the field of three-polycrystalline strained SiGe BiCMOS integrated devices and its preparation, can solve problems such as difficult to meet design, affect device performance, and unsatisfactory photolithography technology
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Embodiment 1
[0123] Embodiment 1: The preparation of a three-polycrystalline strained SiGe BiCMOS integrated device and circuit with a channel length of 22nm, the specific steps are as follows:
[0124] Step 1, SOI substrate material preparation.
[0125] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0126] (1b) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower layer;
[0127] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of the substrate material after hydrogen injection;
[0128] (1d) Put the oxide layer on the surface of the polished lower layer and the upper layer of ...
Embodiment 2
[0191]Embodiment 2: The preparation of a three-polycrystalline strained SiGe BiCMOS integrated device and circuit with a channel length of 130nm, the specific steps are as follows:
[0192] Step 1, SOI substrate material preparation.
[0193] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.7 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0194] (1b) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.7 μm, which is used as the base material of the lower layer;
[0195] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of the substrate material after hydrogen injection;
[0196] (1d) Put the oxide layer on the surface of the polished lower layer and the upper layer...
Embodiment 3
[0259] Embodiment 3: The three-polycrystalline strained SiGe BiCMOS integrated device and circuit with a channel length of 350nm are prepared, and the specific steps are as follows:
[0260] Step 1, SOI substrate material preparation.
[0261] (1a) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;
[0262] (1b) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;
[0263] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the substrate material of the lower layer and the upper layer of the active layer after injecting hydrogen, respectively;
[0264] (1d) Put the oxide layer on the surface of the polis...
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