Tri-polycrystal strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device and preparation method

A technology for integrating devices and devices, which is applied in the field of three-polycrystalline strained SiGe BiCMOS integrated devices and its preparation, can solve problems such as difficult to meet design, affect device performance, and unsatisfactory photolithography technology

Inactive Publication Date: 2014-12-31
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

For example, when the feature size is less than 100nm, due to problems such as tunneling leakage current and reliability, the traditional gate dielectric material SiO 2 Unable to meet the requirements of low power consumption; the short channel effect and narrow channel effect of nanometer devices are becoming more and more obvious, which seriously affects the device performance; traditional lithography technology cannot meet the shrinking lithography precision
Therefore, traditional Si-based process devices are increasingly difficult to meet the needs of design

Method used

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  • Tri-polycrystal strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device and preparation method

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0123] Embodiment 1: The preparation of a three-polycrystalline strained SiGe BiCMOS integrated device and circuit with a channel length of 22nm, the specific steps are as follows:

[0124] Step 1, SOI substrate material preparation.

[0125] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0126] (1b) Select the N-type doping concentration as 1×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower layer;

[0127] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of the substrate material after hydrogen injection;

[0128] (1d) Put the oxide layer on the surface of the polished lower layer and the upper layer of ...

Embodiment 2

[0191]Embodiment 2: The preparation of a three-polycrystalline strained SiGe BiCMOS integrated device and circuit with a channel length of 130nm, the specific steps are as follows:

[0192] Step 1, SOI substrate material preparation.

[0193] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.7 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0194] (1b) Select the N-type doping concentration as 3×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.7 μm, which is used as the base material of the lower layer;

[0195] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of the substrate material after hydrogen injection;

[0196] (1d) Put the oxide layer on the surface of the polished lower layer and the upper layer...

Embodiment 3

[0259] Embodiment 3: The three-polycrystalline strained SiGe BiCMOS integrated device and circuit with a channel length of 350nm are prepared, and the specific steps are as follows:

[0260] Step 1, SOI substrate material preparation.

[0261] (1a) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0262] (1b) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet is oxidized on its surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;

[0263] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the substrate material of the lower layer and the upper layer of the active layer after injecting hydrogen, respectively;

[0264] (1d) Put the oxide layer on the surface of the polis...

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Abstract

The invention discloses a tri-polycrystal strain SiGe BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device and a preparation method. The preparation method comprises the steps of: firstly, preparing an SOI (Silicon On Insulator) substrate; etching a bipolar device region; preparing a tri-polycrystal SiGe HBT (Heterojunction Bipolar Transistor) device in the region; then photoetching an MOS (Metal Oxide Semiconductor) active region; continuously growing an Si buffer layer, a strain SiGe layer and an intrinsic Si layer in the region; respectively forming active regions of an NMOS (N-channel Metal Oxide Semiconductor) device and a PMOS (P-channel Metal Oxide Semiconductor) device; depositing SiO2 and polycrystalline silicon on the active region of the MOS device; preparing a pseudo grid by etching; forming a light dope source drain and a source drain of the MOS device by a self-aligning process; then removing the pseudo grid; preparing grid dielectric lanthanum oxide and tungsten to form the grid; and finally metalizing and photoetching a lead to prepare the integrated device and a circuit. The preparation process provided by the the invention adopts the self-aligning process, and the light dope source drain structure is adopted in the MOS structure so that the influence of hot carriers on the performance of the device is effectively inhibited and the reliability of the device is improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to a three-polycrystalline strained SiGe BiCMOS integrated device and a preparation method. Background technique [0002] Semiconductor integrated circuit technology is the core technology of high-tech and information industries, and has become an important symbol to measure a country's scientific and technological level, comprehensive national strength and national defense strength, while microelectronic technology represented by integrated circuits is the key to semiconductor technology. The semiconductor industry is the basic industry of the country. The reason why it develops so fast is not only the huge contribution of technology itself to economic development, but also its wide applicability. [0003] Gordon Moore, one of the founders of Intel, proposed "Moore's Law" in 1965, which states that the number of transistors on an integrated cir...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/84
Inventor 胡辉勇张鹤鸣宋建军宣荣喜周春宇舒斌吕懿郝跃
Owner XIDIAN UNIV
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