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Memory structure and manufacturing method thereof

A manufacturing method and memory technology, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve problems such as reading errors, inconvenience, non-volatile memory size shrinkage, etc., and achieve reading errors , Reduce the complexity of the process, and reduce the effect of programmed interference

Active Publication Date: 2015-06-10
MACRONIX INT CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] However, with the increase in the integration of semiconductor elements (integrity), the size of the non-volatile memory is also continuously shrinking
Due to the shrinkage of the gate length, the left and right charge storage units in the same memory cell are getting closer and closer, which leads to serious second bit effect problems, so read errors are prone to occur
In addition, due to the shrinkage of the source region and the drain region, the source region and the drain region cannot block the secondary hot electrons (secondary hot electrons) generated by the programmed memory cells, resulting in secondary hot electrons Injected into adjacent memory cells, resulting in program disturbance (program disturbance), thus reducing the reliability of memory components
[0006] It can be seen that the above-mentioned existing memory structure and its manufacturing method obviously still have inconvenience and defects in product structure, manufacturing method and use, and need to be further improved urgently.
In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and there is no suitable structure and method for general products and methods to solve the above-mentioned problems. This is obviously a problem that relevant industry players are eager to solve

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Embodiment Construction

[0052] In order to further explain the technical means and effects that the present invention adopts to achieve the intended invention purpose, the specific implementation, structure and method of the memory structure and its manufacturing method according to the present invention will be described below in conjunction with the accompanying drawings and preferred embodiments. , steps, features and effects thereof are described in detail below.

[0053] The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of preferred embodiments with reference to the drawings. Through the description of the specific implementation, it should be possible to obtain a deeper and more specific understanding of the technical means and effects of the present invention to achieve the intended purpose, but the attached drawings are only for reference and description, not for the purpose of the pres...

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Abstract

The invention relates to a memory structure and a manufacturing method thereof. The memory structure comprises memory cells, and each memory cell is characterized in that a first grid is arranged on a base; a stacking structure comprises a first dielectric structure arranged on the first grid, a channel layer, a second dielectric structure, a second grid, a first electric charge storing structure arranged in the first dielectric structure, and a second electric charge storing structure arranged in the second dielectric structure; at least one of the first electric charge storing structure and the second electric charge storing structure comprises two electric charge storing units separately arranged on a solid body; the first dielectric layer is arranged on the first grid on the both sides of the stacking structure; and a first source and a drain as well as a second source and another drain are arranged on the first dielectric layer, and are respectively located on the both sides of the channel layer. Therefore, the memory structure can overcome a reading error caused by a second bit effect and reduce programmed interference caused by secondary thermal electrons.

Description

technical field [0001] The present invention relates to a memory structure and its manufacturing method, in particular to a memory structure with a plurality of physically separated charge storage units and its manufacturing method. Background technique [0002] Memory is a semiconductor device designed to store information or data. As the functions of computer microprocessors become more and more powerful, the programs and calculations performed by the software also increase. Therefore, the memory capacity requirements are getting higher and higher. Among various memory products, non-volatile memory, such as Electrically Erasable Programmable Read Only Memory (EEPROM) allows multiple data programming, reading and erasing operation, and the data stored in it can be preserved even after the memory is powered off. Based on the above advantages, EEPROM has become a memory widely used in personal computers and electronic devices. [0003] A typical EEPROM uses doped polysili...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/115H01L29/792H01L29/423H01L21/8247H10B69/00
Inventor 程政宪
Owner MACRONIX INT CO LTD