Method for detecting whether race condition exists in PLC (programmable logic controller) ladder diagram program or not

A ladder diagram program and state-of-the-art technology, used in electrical program control, program control in sequence/logic controllers, electrical testing/monitoring, etc. question

Active Publication Date: 2013-04-03
HUAQIAO UNIVERSITY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] 1. The detection work needs multiple experiments to complete, and the work efficiency is low;
[0005] 2. Due to the need to repeat the simulation experiment many times, too much human workload is prone to errors, which increases the error rate

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0057] A kind of method of the present invention detects whether there is race condition in PLC ladder diagram program, specifically comprises the following steps:

[0058] Step 1. Define rules

[0059] (1) Sampling transition and same-address sampling transition: Simulate input quantities such as switches or contacts as a pair of true and false places, and add a pair of connection transitions to the pair of true and false places. Class connection transitions are defined as sampling transitions, denoted as T sample , and this pair of connection transitions is the same address sampling transition as each other;

[0060] (2) Priority in the sampling transition: according to the order of the physical addresses of each switch or contact in the PLC ladder diagram, the nodes corresponding to each switch or contact in the ordinary Petri network are divided into priorities, and then According to the priority of the node, the priority of each pair of sampling transitions in the node ...

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Abstract

The invention provides a method for detecting whether a race condition exists in a PLC (programmable logic controller) ladder diagram program or not. Whether the race condition exists in a program to be detected or not is determined by computing a reachability graph of a common Petri network, so that detection can be completed at a time, and a programmer can directly discover connotative logical errors in the program from the reachability graph clearly and visually. Besides, each detection step can be completed by the computer, so that the method is more outstanding in efficiency, and automation standards are reached.

Description

technical field [0001] The invention relates to a method for detecting logic errors in a PLC (Programmable Logic Controller) program, which is a powerful tool for PLC program verification. Specifically, a method for detecting whether there is a race in a PLC ladder diagram program method. Background technique [0002] Programmable logic controllers (PLCs) are widely used in safety-critical system fields such as aerospace, transportation, nuclear power, petrochemical, electric power and transportation. Traditional PLC program debugging methods can only detect syntax and semantics, and cannot identify hidden logic errors between program variables, such as race conditions. The so-called "race state" means that a given PLC program has continuously changing output values ​​in successive different work cycles under a set of fixed input conditions. For example, in a processing program, there is a "race" in the program that controls the grasping of the mechanical arm. Then, the di...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G05B23/02G05B19/05
Inventor 齐鹏飞罗继亮陈雪琨
Owner HUAQIAO UNIVERSITY
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