Epitaxial wafer manufacturing method suitable for super junction device

Abstract

The invention discloses an epitaxial wafer manufacturing method suitable for a super junction device. The epitaxial wafer manufacturing method suitable for the super junction device comprises the steps of providing a doping silicon wafer, carrying out edge-removing treatment to the silicon wafer, placing the silicon wafer in an epitaxial device, regulating thermal field parameters at the condition of a first temperature value, enabling resistivity of a formed epitaxial thin film to be distributed evenly, setting the process temperature of the epitaxial device as a second temperature value which is 30 degrees higher than the first temperature value, enabling the thermal field parameters not to be changed, and carrying out epitaxial growth. The epitaxial wafer manufacturing method suitable for the super junction device is capable of enabling resistivity of the epitaxial wafer to be distributed in a concentric circle mode, and therefore evenness of breakdown voltage of the super junction device which adopts a groove filling process is improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to an epitaxial wafer manufacturing method suitable for super-junction (super-junction) devices. Background technique [0002] Such as figure 1 As shown, it is a schematic cross-sectional view of the P-type and N-type thin layers of the existing super-junction device; the existing super-junction device adopts trench filling technology, and the structure of the P-type and N-type thin layers includes: N-type epitaxial layer 101 A groove is formed on the N-type epitaxial layer 101, and a P-type epitaxial layer 102 is filled in the groove. The thin N-type epitaxial layer 101 between the P-type epitaxial layers 102 constitutes the P-type and N-type thin layers of the super junction device. [0003] For the P-type epitaxial layer 102 filled in the trench, due to the limitations of epitaxial process equipment and process methods, the resistivity distribut...

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Problems solved by technology

Therefore, the concentration ratio distribution of the P-type epitaxial layer 102 whose resistivity distribution is high in the center and low at the edge and the N-type epitaxial layer 101 whose resistivity is distributed along the lines are inconsistent, resulting in poor BV uniformity.

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