ldmos device and its manufacturing method

Abstract

The invention discloses a laterally diffused metal oxide semiconductor (LDMOS) device. A second conduction type drift region is arranged between a channel and a drain terminal, the upper surface of the drift region is horizontal, at least one second conduction type epitaxy drift region is arranged on the drift region, the epitaxy drift region is only distributed above one side, close to the channel, of the drift region, and the first conduction type and the second conduction type are respectively in a p shape and in an n shape. In an embodiment, the upper surface of the epitaxy drift region is in a horizontal shape. In another embodiment, the upper surface of the epitaxy drift region is in a step shape, the thickness of the epitaxy layer progressively decreases in the direction from the channel to the drain terminal. The invention further discloses a manufacture method of the LDMOS device. The drift region and the epitaxy drift region can joint form a work drift region of the LDMOS device. The thickness of one side, close to the channel, of the work drift region is increased so as to effectively reduce on resistance of the LDMOS device and achieve high breakdown voltage.

Description

technical field [0001] The present application relates to a semiconductor integrated circuit device, in particular to an LDMOS (Laterally Diffused MOS, laterally diffused MOS transistor) device. Background technique [0002] LDMOS devices are often used as power switching devices. see figure 1 , which is a schematic diagram of an existing n-type LDMOS device. In the p-type substrate (or epitaxial layer) 10 there are laterally adjacent p-type doped regions 11 and n-type drift regions 12 . The upper surface of n-type drift region 12 is horizontal. There is an n-type heavily doped source terminal 19 in the middle of the p-type doped region 11 . One end of the gate oxide layer 13 is above the n-type drift region 12 , the other end is above the n-type heavily doped source 19 , and the middle part is above the p-type doped region 11 . There is a gate 14 on the gate oxide layer 13 . There are sidewalls 15 on both sides of the gate oxide layer 13 and the gate 14 . There is an...

AI Technical Summary

Problems solved by technology

Obviously, the on-resistance and breakdown voltage of LDMOS devices are a pair of technical indicators that need to be balanced, and the existing LDMOS devices are difficult to balance

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