Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method of inspecting memory cell

A detection method and memory cell technology, which are used in semiconductor/solid-state device testing/measurement, static memory, instruments, etc., can solve the problems of increasing manufacturing costs and inability to detect memory cells in real time.

Active Publication Date: 2015-07-08
NAN YA TECH
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the above-mentioned related electrical measurements are usually performed after the interconnecting contacts and bitlines are formed, and these interconnecting contacts and bitlines are formed after the transistors and capacitors are fabricated, so they are not Impossible to detect the function of memory cells in real time and may increase related manufacturing costs

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method of inspecting memory cell
  • Method of inspecting memory cell
  • Method of inspecting memory cell

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0033] figure 1 It is a schematic top view showing the layout of the memory cell array in the DRAM device according to an embodiment of the present invention. Such as figure 1 As shown, the layout of the memory cell array here includes several capacitors C and several gate stacks G regularly arranged in and on the semiconductor substrate 100 . These capacitors C may be deep trench capacitors (deep trench capacitors) formed in the semiconductor substrate 100, and these gate stacks belong to several transistors 150 (see figure 2 ), which is formed on the top surface of the semiconductor substrate 100 and partially covers the top surfaces of the adjacent capacitors C. At this time, the entire top surfaces of the gate stacks G and part of the top surfaces of the capacitors C are exposed, and no additional film layer is formed thereon.

[0034] figure 2 for along figure 1 The cross-section of the inner line 2-2 shows these capacitors C and the two gate stacks G formed on and...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A method of inspecting a memory cell is provided, including: providing a semiconductor substrate with a capacitor formed therein and a transistor formed thereon, wherein the transistor is electrically connected to the capacitor; inspecting a size of a top surface of the capacitor and a pitch between the capacitor and the transistor electrically connected thereto by an optical measuring system, thereby obtaining a first measurement data and a second measurement data; and comparing the first and second measurement data with designed specifications of the capacitor and transistor, thereby determining functionality of the memory cell comprising the capacitor and the transistor.

Description

technical field [0001] The present invention relates to a detection technology of a semiconductor device, and in particular to a detection method of a memory cell of a dynamic random access memory device (DRAM device). Background technique [0002] A dynamic random access memory device (DRAM device) is a volatile memory device. Storage of digital data in a DRAM device is performed by charging and discharging a capacitor in the DRAM device. And when the power supplied to the DRAM device is turned off, the data stored in the memory cells in the DRAM device will completely disappear. A memory cell of a DRAM device usually includes at least a field effect transistor (FET) and a capacitor. The capacitors are used to store signals in memory cells of the DRAM device. [0003] There are usually off-state currents in the memory cells of the DRAM device, which affects the function of the memory cell and reduces the yield of the DRAM device including the memory cell. Therefore, ele...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/08
CPCH01L27/10847G11C11/40H01L22/12G11C2029/0403H01L27/10861G11C29/50016H01L22/20H10B12/02H10B12/038
Inventor 蔡子敬陈逸男刘献文
Owner NAN YA TECH
Features
  • Generate Ideas
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More