A method for preparing a gate dielectric structure using ald

Abstract

A method for preparing a gate dielectric structure by ALD comprises the following steps: step (1), placing a substrate in a chamber of an ALD apparatus; step (2), growing a monolayer of HfO2 on the surface of the substrate; step (3), growing a monolayer of Al2O3 on the surface of the monolayer of HfO2; step (4), repeating the step (2) and the step (3), and obtaining the gate dielectric structure with alternately grown HfO2 and Al2O3. The gate dielectric structure with alternately grown HfO2 and Al2O3 prepared in the present invention can sufficiently achieve atom combination and interaction of Hf and Al, and improve electrical performance of the gate dielectric.

Description

technical field [0001] The invention relates to the technical field of preparing integrated circuit devices, in particular to a method for preparing a gate dielectric structure by using ALD. Background technique [0002] With the rapid development of integrated circuit technology, the feature size of MOS field effect transistors continues to shrink, SiO 2 As a gate dielectric material, it can no longer meet the needs of the development of integrated circuit technology below 45nm, and use high-k gate dielectric to replace SiO 2 The gate dielectric can increase the physical thickness of the dielectric layer under the condition of keeping the equivalent oxide layer unchanged, thereby effectively reducing the gate leakage. [0003] HfO 2 As a recently researched gate dielectric material, it has a high dielectric constant (relative dielectric constant is about 25), stable chemical properties and sufficient energy band difference. Experiments have shown that when using HfO 2 W...

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Problems solved by technology

In terms of device performance, considerable literature has studied Al 2 o 3 / HfO 2 When stacked layers are used as the gate dielectric, its dielectric constant is relatively high, and there is no voltage hysteresis, and the breakdown voltage of the device is also high, but its gate leakage current at low voltage is very large, which cannot meet the requirements of the device.

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