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Electric conduction bulge-equipped semiconductor device, packaging structure and manufacture method

A conductive bump and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as empty soldering in the peripheral area, short circuit in the center area of ​​the chip, open circuit, etc., to avoid bridging short circuit , improve the yield and prevent the effect of empty welding

Active Publication Date: 2013-06-05
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Because the welding pads 12 of the current packaging structure are too close to each other, if the solder 14 is not well controlled, for example, if the amount is too large, it may expand outwards and easily cause adjacent solder 14 to cause a bridge short circuit (solder bridge) phenomenon due to being too close. Cause electronic products to burn
Conversely, if the amount is too small, the upper and lower pads 13 and 12 will be disconnected due to empty soldering, especially when the warpage of the chip 18 due to temperature is too large, it is very easy to cause a short circuit in the central area of ​​the chip but empty soldering in the peripheral area. Abnormal situation
[0004] Therefore, how to propose a semiconductor device that avoids bridging short circuits caused by adjacent solders that are too close together and prevents empty soldering is a technical problem that all walks of life want to solve urgently.

Method used

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  • Electric conduction bulge-equipped semiconductor device, packaging structure and manufacture method
  • Electric conduction bulge-equipped semiconductor device, packaging structure and manufacture method
  • Electric conduction bulge-equipped semiconductor device, packaging structure and manufacture method

Examples

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no. 1 example

[0056] Such as Figure 5A As shown, a substrate 501 having a bonding pad 502 on its surface is provided, and the substrate 501 also has a protective layer 503 covering its surface and exposing part of the surface of the bonding pad 502 . The substrate referred to in the embodiments of the present invention may be a wafer, a chip or a circuit board, or even any substrate used for soldering.

[0057] Such as Figure 5B As shown, a metal layer 504 is formed on the surface of the protection layer 503 and the exposed pad 502 by sputtering.

[0058] At Figure 5C and Figure 5D In the shown steps, a first resistive layer 505 is formed on the metal layer 504 , and a first opening 506 corresponding to the position of the solder pad 502 is formed.

[0059] At Figure 5E In the shown step, a first conductive pillar 507 is formed by electroplating on the surface of the metal layer 504 in the first opening 506 .

[0060] At Figure 5F and Figure 5G In the steps shown, a second re...

no. 2 example

[0067] Such as Figure 6A As shown, there is provided a substrate 601 with a bonding pad 602 on its surface, and the substrate 601 also has a protective layer 603 covering its surface and exposing part of the surface of the bonding pad 602 .

[0068] Such as Figure 6B As shown, a metal layer 604 is formed on the surface of the protection layer 603 and the exposed pad 602 by sputtering.

[0069] Such as Figure 6C and Figure 6D As shown, a first resistive layer 605 is formed on the metal layer 604 , and a first opening 606 corresponding to the position of the solder pad 602 is formed. As shown in FIG. 6D', the first resistive layer 605 covers part of the surface of the metal layer 604, and generally, the size of the first opening 606 is smaller than the area of ​​the pad 602.

[0070] Such as Figure 6E and Figure 6E ’, a first conductive post 607 is formed on the surface of the metal layer 604 in the first opening 606, so that the first conductive post 607 constitutes...

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Abstract

An electric conduction bulge-equipped semiconductor device, a packaging structure and a manufacture method are disclosed. The electric conduction bulge-equipped semiconductor device comprises a substrate and electric conduction bulges, wherein welding pads are formed on the substrate, the electric conduction bulges are formed on the welding pads, and each of the electric conduction bulge is provided with a concaved part which is connected with a top face and a side face of each electric conduction bulge. Therefore when the concaved parts are used in welding processes, part of welding materials can be accommodated in the concaved parts and therefore intervals between the electric conduction bulges and outer connection points can be controlled, and missing soldering problems can be prevented.

Description

technical field [0001] The invention relates to a semiconductor device, a packaging structure and a manufacturing method thereof, in particular to a semiconductor device with conductive bumps, a packaging structure and a manufacturing method thereof. Background technique [0002] Due to the increasing importance of various portable electronic products such as communications, networks, and computers and their peripheral products, the trend of lightness, thinness, and shortness, semiconductor manufacturing processes are constantly evolving towards more integrated processes, and these electronic products It is also developing in the direction of multi-function and high performance, and the high-density structure is the goal pursued by the industry. Therefore, semiconductor and packaging manufacturers are bound to actively develop various packaging processes that can make the semiconductor structure more compact and accommodate more components. [0003] Due to the tendency of e...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/48H01L23/485H01L21/60
CPCH01L24/11H01L2224/11H01L2924/15788H01L2924/00H01L2924/00012
Inventor 程吕义邱启新邱世冠
Owner SILICONWARE PRECISION IND CO LTD