Manufacturing method of interconnected structure

Abstract

The invention discloses a manufacturing method of an interconnected structure. The manufacturing method comprises a substrate, wherein a first medium layer is formed on the substrate, multiple metal layers which are arranged at intervals along the horizontal direction are formed in the first medium layer, sheltering layers are covered on the metal layers, and the sheltering layers are arranged at intervals along the horizontal direction. Horizontal widths of the sheltering layers are bigger than those of the metal layers, the first medium layer is removed, removing speed rate of a process on the first medium layer is bigger than that of the process on the sheltering layers, and an opening is formed by surrounding of the metal layers and the sheltering layers. Medium materials are filled in the opening so as to form an air gap which is formed by surrounding of the medium materials, and the horizontal widths of the sheltering layers are bigger than those of the metal layers, so that the horizontal size of the top of the opening is small. When the medium materials are filled in the opening, the medium materials are hard to enter the opening and easily deposit on the top of the opening so as to seal the opening, and the air gap in the big size is formed.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing an interconnection structure. Background technique [0002] One of the challenges encountered in the field of integrated circuit design and manufacturing today is how to reduce the RC delay (Resistive Capacitive delay) of signal transmission. In this regard, one method that the current technology has adopted is to replace the aluminum metal layer with a copper metal layer to reduce the metal delay. Layer series resistance; Another method is to reduce the parasitic capacitance between metal layers, which can be achieved by constructing porous (Porous) low dielectric constant (Low k) material or air gap (Air gap) in the dielectric layer between metal layers. Gap) to achieve. [0003] The prior art discloses a method of fabricating self-aligned nanocolumnar air gaps and the structures fabricated therefrom, such as figure 1 shown. Wherein, the die...

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Problems solved by technology

[0006] However, when the opening is formed, it is easy to form an opening with a large horizontal dimension at the top, which makes it easy for the dielectric material to deposit on the bottom and side walls of the opening, thereby filling the opening and failing to seal the opening in time , which makes the air gap formed smaller, which in turn is not conducive to reducing the RC delay

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