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Semiconductor structure and manufacturing method

A manufacturing method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc.

Inactive Publication Date: 2016-11-09
GLOBALFOUNDRIES INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The former traditional approach is limited to V-shaped layout schemes, while the latter relies on fin extension with selective silicon on extremely small structures, which is extremely challenging

Method used

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  • Semiconductor structure and manufacturing method
  • Semiconductor structure and manufacturing method
  • Semiconductor structure and manufacturing method

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Embodiment Construction

[0012] The present invention relates to semiconductor structures and manufacturing methods. More particularly, the present invention relates to fin FET end implant semiconductor strips and methods of manufacture. More specifically, the present invention provides dense FinFET structures and methods of fabrication with self-aligned extension capabilities. In an embodiment, the method of the present invention includes performing an implant on a terminal block of silicon and etching the fins in the block prior to forming the FinFET gate. This advantageously allows the formation of dense FinFET integration with self-aligned extensions. In an embodiment, the FinFET may have a single crystal structure, which provides a low resistance structure compared to conventional FinFET structures. This advantage can be provided because the implantation process for forming the source and drain regions is performed at steep angles and with lower doses and energies than conventional build-up met...

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Abstract

This paper discloses a fin FET terminal implantation semiconductor structure and a manufacturing method. The method includes forming at least one mandrel (14 in Figure 5) on a silicon layer of a substrate (18') including an underlying insulator layer (10b). The method further includes etching the silicon layer to form at least one silicon island (18') below the at least one mandrel. The method further includes performing ion implantation on sidewalls of at least one silicon island to form doped regions (20) on the sidewalls. The method further includes forming a dielectric layer on the substrate, planarizing a top surface of the dielectric layer so as to be coplanar with a top surface of at least one mandrel (14). The method further includes removing at least one mandrel (14) to form an opening in the dielectric layer. The method further includes etching at least one silicon island to form at least one fin island having doped source and drain regions.

Description

technical field [0001] The present invention relates to semiconductor structures and manufacturing methods. More particularly, the present invention relates to fin FET end implant semiconductor strips and methods of manufacture. Background technique [0002] The component geometries that make up a multi-fin dual-gate Fin Field Effect Transistor (FinFET) lead to manufacturing complexity. For example, the shadowing effect of the blocking resist complicates extended doping in FinFETs when conventional angled ion implantation is used. Specifically, blocking the aspect ratio of the resist to fin pitch causes problems in masking both sides of the structure during ion implantation. This shadowing effect can lead to limited circuit density. [0003] Traditional solutions include using a V-fin layout, implanting obliquely from a twist direction approximately normal to the gate; and implanting end-etched fins at a twist angle approximately normal to the gate. The former traditiona...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/66H01L29/78
CPCH01L21/26586H01L29/785H01L29/66803H01L29/66795
Inventor B·A·安德森E·J·诺瓦克
Owner GLOBALFOUNDRIES INC