Semiconductor device and forming method thereof

Abstract

A forming method of a semiconductor device comprises the steps of providing a substrate, and enabling a first interlayer dielectric layer, a second interlayer dielectric layer and a groove penetrating through the thicknesses of the interlayer dielectric layers to be sequentially formed on the surface of the substrate; processing part of the first interlayer dielectric layer and the second interlayer dielectric layer on a side wall of the groove, respectively forming a first sacrificial layer and a second sacrificial layer, and enabling the width of the first sacrificial layer to be larger than that of the second sacrificial layer; after forming the first sacrificial layer and the second sacrificial layer, filling the groove to form a metal wire layer; after forming the metal wire layer, removing the first sacrificial layer and the second sacrificial layer to form an opening which comprises a first auxiliary opening at the bottom and a second auxiliary opening at the top, and enabling the opening diameter of the first auxiliary opening to be larger than that of the second auxiliary opening; and forming an insulating layer which is covered on the second interlayer dielectric layer and striding the opening. Correspondingly, the invention further provides the semiconductor device formed by adopting the method. Resistance capacitance (RC) effect is low, and performance of a semiconductor integrated circuit is good.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] As the semiconductor industry enters a new era of high-performance and multi-functional integrated circuits, the density of components in integrated circuits will increase, while the size of components and the spacing between parts or components will decrease accordingly. In the past, it was only limited by the ability of lithographic technology to define the structure, and it was difficult to reduce the geometric size of the device. With the development of technology, the size of existing devices can be made smaller, but there are more and more limiting factors. For example, when the distance between the conductive patterns decreases, the capacitance generated by any two adjacent conductive patterns will increase. This increased capacitance results in increased capacitive coup...

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Problems solved by technology

[0010] However, the RC effect of semiconductor devices using the prior art is still large, and the performance of semiconductor integrated circuits is poor

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