Packaging module with embedded package and manufacturing method thereof

A technology for encapsulating modules and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., and can solve problems such as electrical failure of the overall encapsulation module, reduction in encapsulation yield, circuit breakage or short circuit in the carrier board, etc.
CN103208467BActive Publication Date: 2015-12-23KING YUAN ELECTRONICS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
KING YUAN ELECTRONICS
Publication Date
2015-12-23

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Abstract

The invention provides a package module, a package body and a manufacturing method of the two. The package body comprises a first semiconductor chip, a first electrical connection pad and a first package material. The package module mainly comprises the package body and a second semiconductor chip. The package body can be tested firstly after the package is completed so as to ensure that the package body is in a good state for a subsequent modular package. Therefore, a yield of the package module can be maintained, and possibilities that yield of the package module is reduced due to bad completion quality of the package body can be minimized.
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Description

technical field

[0001] The present invention relates to a packaging module, a packaging body and a manufacturing method thereof, in particular to a packaging body without a core board, a packaging module embedded with the packaging body, and a manufacturing method thereof. Background technique

[0002] With the vigorous development of the electronic industry, electronic products tend to be thinner and smaller in form, and gradually enter the research and development direction of high-function, high-performance, and high-speed in terms of function. In order to meet the high integration and miniaturization requirements of semiconductor devices, the volume of the embedded semiconductor chip is also miniaturized, so the area of ​​the electrode pad on the semiconductor chip for electrical connection with the outside is also the same. This situation increases the difficulty of electrical connection and packaging of semiconductor chips.

[0003] The electrical connection and packa...

Claims

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