Semiconductor device and production method thereof

Abstract

The invention discloses a semiconductor device which comprises a plurality of first epitaxial layers, a second epitaxial layer and a gate structure, wherein the first epitaxial layers are overlapped on a substrate and have a first electric conduction type. At least one first doped region and at least one second doped region adjacent to the first doped region are arranged in each first epitaxial layer, the first doped regions have a second electric conduction type, and the second doped regions have the first electric conduction type. The second epitaxial layer is arranged on the first epitaxial layers and has the first electric conduction type. A groove is arranged in the second epitaxial layer, and a third doped region is close to one side wall of the groove and has the second electric conduction type. The gate structure is arranged on the second epitaxial layer disposed above the second doped regions. The invention further discloses a production method of the semiconductor device. By adopting the semiconductor device and the production method of the semiconductor device, on resistance increasing can be avoided, the process can be simplified, and production cost can be reduced.

Description

technical field [0001] The present invention relates to a semiconductor device, in particular to a semiconductor device with a super junction structure and a manufacturing method thereof. Background technique [0002] figure 1 A schematic cross-sectional view of a conventional N-type vertical double-diffused MOSFET (VDMOSFET) is shown. The N-type vertical diffused metal oxide semiconductor field effect transistor 10 includes: a semiconductor substrate and a gate structure located thereon. The semiconductor substrate has an N-type epitaxy drift region 100 and a P-type base region 102 above it to form a P-N junction. Furthermore, there is a drain region 106 under the N-type epitaxial drift region 100 , which is connected to a drain electrode 114 . The P-type body region 102 has a source region 104 connected to a source electrode 112 . The gate structure is composed of a gate dielectric layer 108 and a gate electrode 110 thereon. [0003] In order to increase the withstand...

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Problems solved by technology

However, since the current superjunction structure requires multiple epitaxial growths, and the number of epitaxial growths depends on the withstand voltage of the P-N junction, the fabrication of the above superjunction structure has disadvantages such as complicated process and high manufacturing cost.

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