Particle fluence rate selection method for large scale integrated circuit accelerator single particle test

A large-scale integrated circuit and particle fluence rate technology, applied in the field of irradiation test, can solve the problems of inaccurate single-particle flipping of large-scale circuits, and achieve the effect of strong operability and improved accuracy

Active Publication Date: 2013-09-25
CHINA ACADEMY OF SPACE TECHNOLOGY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The technical problem of the present invention is: to overcome the deficiencies of the prior art, to provide a particle fluence rate selection method in the large-scale integrated circuit

Method used

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  • Particle fluence rate selection method for large scale integrated circuit accelerator single particle test
  • Particle fluence rate selection method for large scale integrated circuit accelerator single particle test
  • Particle fluence rate selection method for large scale integrated circuit accelerator single particle test

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Experimental program
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Effect test

Embodiment 1A

[0025] Embodiment 1 ASIC device single particle test fluence rate selection

[0026] 1) Internal design structure and application program analysis

[0027] ASIC device X has no internal TMR or EDAC design, and adopts DICE structure design, and it is judged that the single event error has nothing to do with the fluence rate.

[0028] 2) According to ASTM F1192 standard, high fluence rate is used for irradiation test

[0029] The ASTM F1192 standard stipulates the requirements for the fluence rate of the single particle test, and the high fluence rate can be used for the irradiation test according to the regulations.

[0030] The conclusion was verified experimentally. The single particle error test was carried out under different fluence rates, and the test results are shown in Table 1. It can be seen from Table 1 that there is no significant difference in the single event error cross section of the device under different fluence rates.

[0031] Table 1 ASIC device test res...

Embodiment 2

[0033] Embodiment 2 SRAM type FPGA device single particle test fluence rate selection

[0034] 1) Internal design structure and application program analysis

[0035] The SRAM type FPGA device Y1 does not adopt the DICE structure design internally, but adopts TMR plus refresh, and it is judged that the single event error is related to the fluence rate.

[0036] 2) Irradiation test with low fluence rate

[0037] Irradiation should be carried out at a low fluence rate. When the fluence rate is changed by more than an order of magnitude, the single particle error cross section of the device has nothing to do with the fluence rate, and the fluence rate is considered appropriate.

[0038] The conclusion was verified experimentally. The single particle error test was carried out under different fluence rates, and the test results are shown in Table 2. It can be seen from Table 2 that there are obvious differences in the single event error cross section of the device under differen...

Embodiment 3

[0041] Embodiment 3 SRAM type FPGA device single particle test fluence rate selection

[0042] 1) Internal design structure and application program analysis

[0043] The SRAM type FPGA device Y2 does not use the DICE structure design, nor does it use TMR, and the single event error is judged to have nothing to do with the fluence rate.

[0044]2) According to ASTM F1192 standard, high fluence rate is used for irradiation test

[0045] The ASTM F1192 standard stipulates the requirements for the fluence rate of the single particle test, and the high fluence rate can be used for the irradiation test according to the regulations.

[0046] The conclusion was verified experimentally. The single particle error test was carried out under different fluence rates, and the test results are shown in Table 3. It can be seen from Table 3 that there is no significant difference in the single event error cross-section of the device under irradiation at different fluence rates.

[0047] Ta...

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Abstract

The invention provides a particle fluence rate selection method for a large scale integrated circuit accelerator single particle test. The particle fluence rate selection method for the large scale integrated circuit accelerator single particle test including the following steps: S1, judging whether the DICE design is adopted inside a large scale integrated circuit or not, S2, conducting high-fluence rate irradiation on the large scale integrated circuit according to the ASTMF 1192 standard code if the DICE design is adopted, S3, judging whether the TMR is adopted in the large scale integrated circuit or not according to the procedures used by the large scale integrated circuit if the DICE design is not adopted, S4, conducting low-fluence rate irradiation on the large scale integrated circuit if the TMR is adopted, S5, judging whether the EDAC is adopted in the large scale integrated circuit or not according to the procedures used by the large scale integrated circuit if the TMF is not adopted, S6, conducting the low-fluence rate irradiation on the large scale integrated circuit if the EDAC is adopted, and S7, conducting the high-fluence rate irradiation on the large scale integrated circuit if the EDAC is not adopted. Compared with the prior art that only the high-fluence rate irradiation is used, the particle fluence rate selection method for the large scale integrated circuit accelerator single particle test improves irradiation evaluation accuracy.

Description

technical field [0001] The invention relates to a particle fluence rate selection method in a single particle test of a large-scale integrated circuit accelerator, and belongs to the technical field of radiation tests. Background technique [0002] One of the important work content of large-scale integrated circuit anti-radiation hardening guarantee is the single event flip test. Existing single particle test methods, such as QJ10005 "Guidelines for Heavy Ion Single Event Testing of Aerospace Devices" and ASTM F1192 "Guidelines for Measuring Single Event Phenomena of Semiconductor Devices Caused by Heavy Ions", stipulate that ground single particle tests should be carried out at high fluence rates, and note that Quantity rate is generally in the range of 1 to 10 4 Particles / cm 2 .s, the fluence rate of space radiation particles is generally lower than 1×10 -3 Particles / cm 2 .s, much lower than the test fluence rate. With the development of microelectronics design and ma...

Claims

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Application Information

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IPC IPC(8): G01R31/00
Inventor 于庆奎罗磊祝名张磊孙毅唐民
Owner CHINA ACADEMY OF SPACE TECHNOLOGY
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