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Bit rate estimation method of SAO mode decision applied to encoder of HEVC standard

An encoder and bit rate technology, applied in the field of high-definition digital video compression encoding and decoding, can solve the problems of consuming chip area, limiting chip operating frequency, and time-consuming

Active Publication Date: 2013-12-11
FUDAN UNIV
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Problems solved by technology

[0006] When the module makes a mode decision, it needs to calculate the value of the bit rate that needs to be transmitted in this mode. In the official reference software HM9.0 of HEVC, the value of the bit rate needs to be calculated by the CABAC encoder, and this step In hardware design, it is a process that consumes time and chip area, and at the same time limits the operating frequency of the chip.

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  • Bit rate estimation method of SAO mode decision applied to encoder of HEVC standard
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  • Bit rate estimation method of SAO mode decision applied to encoder of HEVC standard

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Embodiment Construction

[0025] The method of the present invention will be further specifically described below by way of examples and in conjunction with the accompanying drawings.

[0026] 1. Mode judgment of Y component

[0027] The Y component will compare the component in the 5 modes of EO_0, EO_1, EO_2, EO_3, and BO, which mode has the smallest Cost, that is, the Y component selects the 4 offsets in this mode. Under normal circumstances, the value of Bitrate will be obtained through CABAC entropy encoding, but this process is a time-consuming, chip-area-consuming process in hardware design, and will limit the operating frequency of the chip. The present invention proposes a method for quickly obtaining the Bitrate value, as shown in formulas (3) and (4), where formula (3) is the formula for calculating the bit rate obtained by the Y component in EO_0, EO_1, EO_2, and EO_3 modes, where offset i (i=0,1,2,3) are the 4 offset values ​​in this mode. The offset value can be obtained by formula (2)...

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Abstract

The invention belongs to the technical field of high-definition digital video compression coding and decoding, and particularly relates to a bit rate estimation method of SAO mode decision applied to an encoder of the HEVC standard. A few statistical information is obtained according to a formula, then four offsets of a luminance component Y of a current block image in the SAO mode decision under 5 ED modes, namely 20 offsets, are obtained in total, and a chrominance component Cb and a chrominance component Cr which correspond to the Y respectively have 4 offsets under the EO modes. Distortion means distortion, lambda stands for a constant coefficient, Bitrate serves as a bit rate, and Cost is a cost value under a certain mode. According to the bit rate estimation method, bit rate estimation of the mode decision in an SAO module can be quickly carried out, hardware expenditure is reduced, meanwhile operating frequency of hardware can be obviously improved, and thus real-time coding of high-definition videos can be achieved.

Description

technical field [0001] The invention belongs to the technical field of high-definition digital video compression encoding and decoding, and is aimed at the HEVC video encoding and decoding standard, and specifically relates to a bit rate estimation method for mode judgment of an SAO module in a video encoder, which is applicable to the HEVC video encoding standard. Background technique [0002] HEVC (High Efficiency Video Coding) is a next-generation video codec standard proposed by JCTVC, an organization jointly established by the International Telecommunications Organization (ITU) and the Motion Picture Experts Group (MPEG). The goal is to double the compression rate compared to the previous generation standard H.264 / AVC under the premise of the same visual effect. [0003] HEVC-based video encoder, its structure diagram is as follows figure 1 As shown, it is mainly composed of the following modules: intra prediction, inter prediction, transformation, quantization, invers...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/26H04N7/50
Inventor 范益波沈蔚炜刘聪曾晓洋
Owner FUDAN UNIV
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