Method for symmetric cryptographic algorithm to resist side-channel analysis

A symmetric cryptographic algorithm and cryptographic technology, applied in the field of symmetric cryptographic algorithm resistance to side channel analysis

Inactive Publication Date: 2014-03-19
BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
View PDF3 Cites 12 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] Symmetric cryptographic algorithms such as DES, AES, etc., which have been proved to be sufficiently safe

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for symmetric cryptographic algorithm to resist side-channel analysis
  • Method for symmetric cryptographic algorithm to resist side-channel analysis

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0010] The present invention is applicable to a variety of symmetric encryption algorithms. The specific implementation of the method of the present invention will be described below by taking the common DES algorithm among the symmetric encryption algorithms as an example.

[0011] The original calculation process of the DES algorithm is to divide the 64-bit plaintext into left L0 and right R0, each with 32 bits, and the right half of the data R0 is extended to 48-bit width through the expansion transformation E, and then it is different from the 48-bit wide round key Key1. Or, the generated 48-bit data is divided into 6-bit groups, a total of 8 groups, and 32-bit data is generated through 8 6-in and 4-out SBOXs. The result is transformed by P and then XORed with the left half of the data L0 to generate a round operation result R1=L0^F(R0, key1), R0 is swapped to the left half to generate L1=R0. Repeat this step until 16 rounds of calculations are completed.

[0012] Applyin...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention relates to a method for a symmetric cryptographic algorithm to resist side-channel analysis. The method can be used for resisting side-channel attack for a symmetric cryptographic algorithm and preventing an attacker from acquiring a computation key of the symmetric algorithm through side-channel analysis. The symmetric cryptographic algorithm can be realized by hardware and software. In the computation process, a realization carrier leaks key information of computation through a side channel, such as carrying out differential power analysis attack with the use of power consumption information in the computation process. Side-channel analysis poses a great threat to software and hardware realization security of the symmetric cryptographic algorithm. The invention provides a method for the symmetric cryptographic algorithm to resist side-channel analysis. In the whole process of symmetric cryptographic computation, no clear data known to attackers participates in computation, an intermediate result in symmetric cryptographic computation has a random mask, and the mask of each round of computation is different from masks of other rounds, which makes it extremely difficult for attackers to acquire key information from side-channel analysis and realizes protection on the key of the symmetric cryptographic algorithm.

Description

technical field [0001] The invention relates to a method for safely executing DES cipher algorithm in electronic components, in particular to a method for resisting side-channel attacks when electronic components execute DES algorithm. Background technique [0002] Symmetric cryptographic algorithms such as DES, AES, etc., which have been proved to be sufficiently safe in mathematical principles, have many security holes in the software and hardware implementation process. These security vulnerabilities are often obtained and analyzed statistically by attackers through side channels such as power consumption, computing time, and electromagnetic radiation. Side-channel analysis can measure and record side-channel information such as power consumption, time, and electromagnetic radiation in the process of cryptographic algorithm operations, and obtain key information used in cryptographic operations through mathematical calculations, which has a great impact on the security of...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H04L9/06
Inventor 袁永锋陈波涛
Owner BEIJING CEC HUADA ELECTRONIC DESIGN CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap