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Resistive random access memory and reset operation method thereof

A technology of resistive memory and reset operation, applied in the field of microelectronics, can solve the problems of high power consumption, long reset operation time, failure of unit resistance reset, etc., to achieve the effect of not reducing yield, shortening time, and improving efficiency

Inactive Publication Date: 2014-03-26
FUDAN UNIV
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  • Claims
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Problems solved by technology

[0004] However, for the method of using SVP to realize setting, if the fixed single-pulse excitation is still applied when the resistance of the resistive memory unit is successfully set, a large current will be generated in a low-resistance state, resulting in large power consumption; for Using RPS to realize the reset method, during the application of each excitation pulse, if the excitation is still applied when the resistance of the resistive memory cell is reset successfully, the cell resistance may be set back and cause the reset to fail, so that the yield rate of the reset operation is not high.
Compared with the method of using RPS to realize the reset, the method of using RPS&SAWM to realize the reset can save the power consumption of the set operation, and the reset yield rate has also been greatly improved. However, the feedback itself during the reset operation has a verification function, and each reset excitation pulse There will be a verification operation after that, resulting in a longer reset operation time

Method used

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  • Resistive random access memory and reset operation method thereof
  • Resistive random access memory and reset operation method thereof
  • Resistive random access memory and reset operation method thereof

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Embodiment Construction

[0037] Introduced below are some of the many possible embodiments of the invention, intended to provide a basic understanding of the invention. It is not intended to confirm the key or decisive elements of the present invention or limit the scope of protection.

[0038] figure 1 Shown is a schematic diagram of the shape of a continuous stepped pulse used during a reset operation according to an embodiment. The reset operation process of this embodiment includes the following steps:

[0039] S10, selecting one or more memory cells that need to be reset in the memory array of the resistive random access memory;

[0040] S20, applying a continuous stepped pulse 90 to the memory cell to be reset. Such as figure 1 As shown, in this embodiment, the continuous stepped pulse 90 is described by taking a voltage pulse as an example. The continuous stepped pulse 90 can raise the height of the pulse stepwise with the increase of time t, for example, from V 0 Raise to V 1 , V 1 Raise to V 2 、Co...

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Abstract

The invention relates to the technical field of microelectronics, and particularly relates to a resistive random access memory and a reset operation method thereof. The resistive random access memory comprises a control circuit, a writing voltage generation circuit and a current detection circuit, wherein the resistive random access memory is subjected to reset operation by adopting continuous ladder pulses. By adopting the resistive random access memory disclosed by the invention, no reduction of reset yield is ensured besides a verifying operation in the reset operation process, the reset operation time is also shortened, and the resistive random access memory has a good application value.

Description

Technical field [0001] The invention belongs to the technical field of microelectronics, and specifically relates to a resistive switching memory (Resistive Switching Memory) and a reset operation method thereof. Background technique [0002] Resistive random access memory is also called resistive memory, which stores information based on a memory layer with a resistance conversion function. Generally, the operation of resistive random access memory includes read operation, set operation and reset operation, among which the set operation is the process of transitioning from the high resistance state to the low resistance state, and the reset operation is caused by The process of changing from a low resistance state to a high resistance state. [0003] The setting operation of the existing resistive random access memory generally uses a fixed single pulse excitation, that is, the SVP (single voltage pulse) method. The reset operation adopts a discrete pulse sequence with gradually...

Claims

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Application Information

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IPC IPC(8): G11C11/56G11C7/20
Inventor 林殷茵薛晓勇
Owner FUDAN UNIV
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