An Automatic Verification Method for Parametric Systems
An automatic verification and parameterization technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of manual verification and high verification cost
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[0058] figure 1 It is a logical structure diagram of the parametric system automation verification framework constructed in the first step of the present invention. The entire verification framework consists of a read-in module, a true concurrent synthesis module, a model abstraction module and a verification module.
[0059] The read-in module reads in the required data from the file and the terminal, and sends it to the true concurrent synthesis module and the model abstraction module after processing. First, the read-in module reads in a single process state transition table T from an external file, and establishes a single-process LTS model M. The state transition table T describes the state transition of a single process in the form of a file, including two parts: state and transition relationship. The state transition table records the state name, action name and transition relationship, and each transition relationship is a triplet: . Each state corresponds to an ele...
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