Semiconductor device manufacturing method

Abstract

The invention provides a transistor manufacturing method utilizing a gap wall technology to form a gate electrode. In the transistor manufacturing method, the first gap wall, the second gap wall, the third gap wall and the fourth gap wall are sequentially formed, a gate electrode groove with the width controlled by the second gap wall is formed by removing the second gap wall, and then the required gate electrode and a gate electrode insulating layer are formed in the gate electrode groove. In the method, the gap walls are formed through back etching without an additional mask. In addition, the gate electrode width is defined by controlling the width of the second gap wall, formation of a 45nm sub gate electrode line can be achieved, and a process has good controllability.

Description

technical field [0001] The invention relates to the field of manufacturing methods of semiconductor devices, in particular to a method for manufacturing transistor devices using spacer technology to form gates. Background technique [0002] After semiconductor integrated circuit technology enters the technology node of 90nm feature size, it becomes more and more challenging to maintain or improve transistor performance. In the sub-45nm area, high-K gate insulating materials and metal gates are used to maintain and improve transistor performance. However, when the size of the gate line enters the sub-45nm field, the controllability of the gate line formation process begins to encounter great difficulties. People cannot well control the shape of the obtained gate line, which will affect the Transistor performance. [0003] Therefore, it is necessary to provide a new method for manufacturing transistors, which can form sufficiently fine gate lines while making the process con...

AI Technical Summary

Problems solved by technology

[0004] The invention provides a method for manufacturing a transistor, which utilizes spacer technology to form a gate similar to the gate last process (gate last), which overcomes the defect of poor process controllability in the prior art

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