A method of manufacturing a semiconductor device

Abstract

The invention provides a manufacturing method of a semiconductor device. The method comprises the following steps: providing a semiconductor substrate, and forming a lamination structure formed by stacking a grid dielectric layer, a grid material layer and a hard mask layer from the bottom to the top on the semiconductor substrate; etching the lamination structure, and forming a grid structure on the semiconductor substrate; etching back the hard mask layer to remove the hard mask layer disposed above the two sides of the top portion of the grid structure; forming a side wall material layer surrounding the grid structure and the hard mask layer; etching the side wall material layer to form a side wall at the two sides of the hard mask layer and the two sides of the grid structure; forming a sacrificial interlayer dielectric layer at the two sides of the side wall disposed at the two sides of the grid structure; forming a groove at the two sides or the middle portion of the top portion of the grid structure; and forming a self-aligning metal silicide. According to the invention, through forming the groove at the two sides or the middle portion of the top portion of the grid structure, the surface area of the grid structure is increased, and the grid resistance is reduced accordingly.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for reducing gate resistance. Background technique [0002] In the metal-oxide-semiconductor manufacturing process, the formation of salicide is used to reduce the gate resistance of CMOS devices, thereby increasing the operating speed of the devices. [0003] The existing salicide formation process includes the following steps: firstly, a semiconductor substrate is provided, and an isolation structure and various well structures are formed in the semiconductor substrate; then, a gate is formed on the semiconductor substrate electrode structure, sidewall structures on both sides of the gate structure, and using the sidewall structures as masks to form source / drain regions in the semiconductor substrate on both sides of the sidewall structures; finally, on the source / drain A salicide is formed on the region and on top of the gate structure. [0004] With the cont...

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Problems solved by technology

[0004] With the continuous reduction of the size of semiconductor devices, the size of the gate of semiconductor devices is also continuously reduced. The most significant change is the reduction of the length of the gate, which leads to the increase of gate resistance (such as gate sheet resistance) , causing a degradation in device performance

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