Ldmos tube with lateral concentration gradient in drift region and manufacturing method thereof

Abstract

The invention discloses an LDMOS transistor with a lateral concentration gradient in the drift region. The field plate of the LDMOS transistor is divided into two parts: a depletion region and a connection region. The depletion region is connected to the gate, and the doping type is opposite to that of the gate; The region is close to the drain and connected to the drain, and has the same doping type as the gate. The invention also discloses a manufacturing method of the above-mentioned LDMOS tube. The invention divides the field plate into two parts, the depletion region and the connection region with different doping types, and forms an NPN (or PNP) structure together with the gate, so that the voltage difference between the gate and the drain can be continuously distributed on the field plate In the depletion region, thereby reducing the voltage difference between the field plate and the drift region, especially the drain, and eliminating the hot carrier effect caused by the field plate.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to an LDMOS transistor with a lateral concentration gradient in a drift region and a manufacturing method thereof. Background technique [0002] In the design of LDMOS, how to improve the withstand voltage of the LDMOS tube has always been the core content of device design. At present, the technologies for improving the withstand voltage of LDMOS transistors mainly include optimizing the doping concentration and size of the drift region, the application of field plates, and various RESURF technologies for reducing the surface electric field intensity. Among them, the field plate technology is widely used because of its simple technology and good effect. The use of the field plate effectively reduces the peak electric field and improves the electric field distribution in the channel and the drift region under the field oxygen. [0003] The current field plate structu...

AI Technical Summary

Problems solved by technology

For PLDMOS, when the gate voltage is zero or at a lower negative gate operating potential, and the drain is connected to a higher negative operating potential, the electric field is the downward electric field that the field plate points to the drift region , the holes will be pulled downwards, and the electrons will be pushed upwards, causing electrons to be injected into the field oxygen, captured by the field oxygen and accumulated at the interface of the field oxygen to form a charge layer, which will affect the energy band of the drift region, and then affect Device characteristics, usually for PLDMOS tubes will cause the resistance of the drift region to decrease, which will increase the linear current, such as image 3 shown

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