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High voltage open drain electrostatic discharge (ESD) protecting device

An electrostatic discharge protection and electrostatic discharge technology, applied in circuits, electrical components, electric solid devices, etc., can solve the problems of increasing the cost of integrated circuits and excluding metal oxide semi-field effect transistors.

Active Publication Date: 2014-06-25
AMAZING MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the original open-drain I / O cell does not contain a high-voltage P-channel MOSFET connected to the power line by the I / O pad.
Therefore, the number of mask layers will increase due to the redundant high-voltage P-channel MOSFETs using high-voltage complementary MOSFET inverters, which means that the cost of integrated circuit (IC) manufacturing will also increase. improve

Method used

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  • High voltage open drain electrostatic discharge (ESD) protecting device
  • High voltage open drain electrostatic discharge (ESD) protecting device
  • High voltage open drain electrostatic discharge (ESD) protecting device

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Embodiment Construction

[0033] see image 3 , the present invention includes a first high-voltage N-channel metal-oxide-semiconductor field-effect transistor 14, which is connected to a high-voltage pad 16 and a low-voltage terminal VSS, and receives a high-voltage signal from the high-voltage pad 16 to operate normally. wherein the gate of the first high-voltage N-channel MOSFET 14 is in a floating state when an ESD event occurs (the gate is controlled to be turned on or off by the driving circuit in a normal operation state). The high-voltage pad 16 is connected to the first high-voltage N-channel metal-oxide-semiconductor field-effect transistor 14 with a high-voltage electrostatic discharge protection unit 18, which is used to block high voltage during normal operation; and when an electrostatic discharge event occurs, The positive ESD voltage or the negative ESD voltage of the high voltage pad 16 is received to release a first ESD current or a second ESD current when an ESD event occurs on the h...

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Abstract

The invention discloses a high voltage open drain electrostatic discharge (ESD) protecting device which comprises a first high voltage N passage metal-oxide-semiconductor field effect transistor (HV MOSFET) which is connected with a high voltage welding pad and a low voltage end and receives high voltage of the high voltage welding pad so as to operate normally. The high voltage welding pad and the first HV MOSFET are further connected with a high voltage ESD protecting unit which does not influence the normal circuit function at normal operation time, but when ESD events of the high voltage welding pad occur, the high voltage ESD protecting unit can efficiently release ESD currents of the ESD events after receiving the ESD voltage of the high voltage welding pad. The high voltage ESD protecting unit and the low voltage end are connected with a voltage clamping unit. According to the high voltage ESD protecting device, the high voltage ESD protecting unit receives the ESD voltage so as to release the ESD currents.

Description

technical field [0001] The invention relates to a protection device, in particular to a high-voltage open-drain electrostatic discharge (ESD) protection device. Background technique [0002] The open-drain input / output (I / O) cell design is suitable for applications where the external voltage applied to the I / O pad is higher than the internal supply voltage of the I / O cell database. For a high-voltage open-drain buffer, it must not contain a high-voltage P-channel metal-oxide-semiconductor field-effect transistor (HV PMOSFET) connected from the I / O pad to the power line so that the I / O pad remains A voltage higher than the supply voltage. Therefore, it is difficult for an open-drain buffer to have excellent ESD protection capability. [0003] see figure 1 , the traditional multi-channel high-voltage open-drain buffer uses an ESD bus to reduce the size of the open-drain buffer, wherein each open-drain channel shares the same ESD clamping element 10 to discharge the ESD curr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02
Inventor 彭政杰陈志豪姜信钦
Owner AMAZING MICROELECTRONICS