Random access memory bit cell, random access memory and electronic chip

Abstract

The embodiment of the invention provides a random access memory bit cell, a random access memory and an electronic chip, belonging to the field of storages, and aiming at solving the problems of reliability and power consumption of the memory. The random access memory bit cell comprises at least one power supply, a first write-in wire, a second write-in wire, a write-in bit wire, a reading wire, a reading bit wire, a reading module, an asymmetrical storage module and a conduction module. The random access memory consists of the random access memory bit cells with preset number; the electronic chip comprises the random access memory. The reliability and the power consumption of the random access memory can be optimized.

Description

technical field [0001] The invention relates to the storage field, in particular to a random access memory bit unit, a random access memory and an electronic chip. Background technique [0002] With the improvement of the manufacturing process of electronic chips, the size of transistors has entered the quasi-nano era, and the integration of transistors in electronic chips is getting higher and higher, resulting in the emergence of high-performance chips composed of VLSI. The demand for high-performance chips has created The era of System on Chip (SoC). [0003] Such as figure 1 As shown, it is a bit cell (Bit Cell) structure of an eight-tube Static Random Access Memory (SRAM) commonly used in the prior art. This kind of SRAM bit cell structure has three states in total, which are : hold status, read status and write status. Wherein, the writing line controls the conduction of the pass transistor, that is, the switching function. The bit line controls the data state of t...

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Problems solved by technology

[0007] Because the above-mentioned eight-tube SRAM has high reliability and low power consumption, the above-mentioned eight-tube SRAM is widely used in high-performance chips, but as the chip volume continues to decrease, the integration level is getting higher and higher , while the performance continues to improve, its power consumption has increasingly become a problem that needs special consideration in the design

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