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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as large leakage current, affecting the performance of semiconductor devices, and small threshold voltage

Active Publication Date: 2014-07-23
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, in practical applications, traditional vertical MOS transistors (VMOS) are often prone to large leakage currents due to the existence of parasitic bipolar transistors within the device
In addition, the traditional vertical MOS transistor is relatively easy to cause a small threshold voltage (Vth) due to the influence of the gate length.
The above-mentioned problems of traditional VMOS will inevitably affect the performance of semiconductor devices to a certain extent when it is applied.

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment 1

[0051] An embodiment of the present invention provides a semiconductor device, and the semiconductor device may be a vertical MOS transistor (VMOS), or a semiconductor device using VMOS (such as a semiconductor integrated circuit, etc.). Wherein, the vertical MOS transistor refers to a transistor having a vertical channel.

[0052] In the semiconductor device of the embodiment of the present invention, a dielectric layer (dielectric layer) is disposed on the side of the drain of the vertical MOS transistor (specifically, between the drain and the body of the transistor). Wherein, the material of the dielectric layer may be silicon dioxide (SiO2) or other dielectric materials. Preferably, the material of the dielectric layer is silicon dioxide.

[0053] Exemplarily, the semiconductor device of the embodiment of the present invention can be as Figure 1O shown. Figure 1O The semiconductor device in shows a vertical MOS transistor (VMOS), which includes a semiconductor substr...

Embodiment 2

[0059] The method for manufacturing a semiconductor device according to the embodiment of the present invention is used to manufacture the semiconductor device described in Embodiment 1. The method for manufacturing a semiconductor device of this embodiment is used for manufacturing a semiconductor device including a vertical MOS transistor, which includes the step of manufacturing a dielectric layer between the drain and the body of the vertical MOS transistor.

[0060] Below, refer to Figure 1A-Figure 1O The detailed steps of an exemplary method of the semiconductor device manufacturing method proposed by the embodiment of the present invention will be described. in, Figure 1A-Figure 1O A schematic cross-sectional view of various steps of the exemplary method is shown. The method is as follows:

[0061] Step 1: Provide a semiconductor substrate 100 , and sequentially form (for example, deposit) a stack structure including a first insulating layer 101 , a first sacrificial...

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof, and relates to the technical field of semiconductors. The semiconductor device provided by the invention comprises a vertical MOS transistor, and a dielectric layer is arranged between the drain of the vertical MOS transistor and the main body. The manufacturing method of the semiconductor device comprises the step of manufacturing the dielectric layer located between the drain of the vertical MOS transistor and the main body. According to the semiconductor device provided by the invention, as the dielectric layer is arranged between the drain of the vertical MOS transistor and the main body, current leakage caused by a parasitical bipolar transistor can be effectively restrained and the threshold voltage can be improved. The semiconductor device manufactured by the manufacturing method of the semiconductor device provided by the invention also has the above advantages.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the field of semiconductor technology, with the continuous development of semiconductor device manufacturing technology, vertical MOS transistors (VMOS for short) have increasingly broad application prospects due to their excellent device performance. [0003] However, in practical applications, traditional vertical MOS transistors (VMOS) are often prone to large leakage currents due to the existence of parasitic bipolar transistors within the device. In addition, the traditional vertical MOS transistor is relatively easy to cause a small threshold voltage (Vth) due to the influence of the gate length. The above-mentioned problems of the traditional VMOS inevitably affect the performance of the semiconductor device to a certain extent when it is applied. [0004] Therefore, it is ...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/78H01L29/06
CPCH01L29/0653H01L29/66666H01L29/7827
Inventor 刘金华
Owner SEMICON MFG INT (SHANGHAI) CORP