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Peripheral communication

A technology of peripheral equipment and communication system, applied in the field of communication, can solve the problems of energy consumption, slowness, unpredictable timing, etc., to achieve the effect of fast communication and power saving

Active Publication Date: 2014-07-30
NORDIC SEMICONDUCTOR
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the mechanism can be slow and can lead to unpredictable timing because the processor may have to wake up from a low power (sleep) state or have to complete its current operation before forwarding the message
Communication from one peripheral device to another peripheral device may also result in significant power consumption due to waking up the processor if the processor is in a sleep state

Method used

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Examples

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Embodiment Construction

[0078] figure 1 A microprocessor (MCU) 2 (eg, integrated circuit or multi-die module) is shown including a central processing unit (CPU) 6 , main memory 8 , and PPI 10 with logic area 12 and internal memory 14 . Both the CPU 6 and the PPI 10 are connected to the bus 16 .

[0079] Also connected to the bus 16 are five exemplary peripherals: a timer 18 , a DAC 20 , a UART 22 , a hardware encryption engine 24 , and a voltage comparator 26 .

[0080] Alternatively, a dedicated bus is provided which is set apart from the CPU bus and used to send task and event signals; for example, the bus 16 may be composed of at least two separately set buses.

[0081] The timer 18 has an output event register 28 , an overflow event register 30 and an input task register 32 . The DAC 20 has two conversion complete event registers 36 , 38 and two trigger task registers 40 , 42 . The UART 22 has an RX receive event register 44 , a TX complete event register 46 , an RX trigger task register 48 , ...

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PUM

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Abstract

Peripherals(18, 20, 22, 24, 26) are connected to a processor (6) and a programmable peripheral interconnect (10) is connected to each peripheral. One of the peripherals (18) is configured to signal an event to the interconnect, and one of the peripherals (20) is configured to respond to a task signal from the interconnect by performing a task. The task-receiving peripheral (20) has a task register (40), addressable by the processor (6), and performs the task in response to a change in the contents of the register (40). The interconnect (10) accesses a memory (14) in which a mapping is stored between an event of a first peripheral (18) and a task of a second peripheral (20), the mapping comprising (i) an identification of the event, and (ii) the address of a task register (40). The mapping causes the interconnect (10) to provide a channel by sending a task signal to the second peripheral (20) in response to a signal of the event from the first peripheral (18).

Description

technical field [0001] The invention relates to communication between peripheral devices connected to a processor. Background technique [0002] Microcontroller systems typically include peripheral devices that are separate from, but usually connected to, the central processing unit (CPU) via a bus. These peripherals may be located on the same integrated circuit or within the same multi-chip module or system-level package as the processor (eg, system-on-a-chip). Alternatively, the peripherals may be located off-chip from the main processor, eg, in a different package. Examples of peripherals include timers, cryptographic engines, serial interfaces (UARTs), and embedded radio transceivers. [0003] In a simple architecture, the processor communicates directly with each peripheral. One peripheral communicates with another peripheral via the processor, for example, using interrupts. However, the mechanism may be slow and may cause unpredictable timing, since the processor m...

Claims

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Application Information

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IPC IPC(8): G06F13/24
CPCG06F13/24G06F13/287G06F13/385Y02D10/00G06F13/12G06F13/4022
Inventor 朱奈德·伊拉希琼·欧莱·如斯坦拉塞·奥尔森拉尔斯·桑戴尔
Owner NORDIC SEMICONDUCTOR