Thin-film transistor array base plate, display panel and display device

Abstract

The invention discloses a thin-film transistor array base plate, a display panel and a display device. The thin-film transistor array base plate comprises a base plate body, a plurality of grid lines, a plurality of data lines, a plurality of pixel units, insulated layers and pixel electrodes, wherein the grid lines and the data lines are arranged on the base plate body, and are crossed and insulated; the pixel units are arranged in areas defined by the grid lines and the data lines, and any pixel unit comprises a switch component; the insulated layers are located on the switch components, and are provided with through holes; the pixel electrodes are located on the insulated layers, and are electrically connected with the switch components via the through holes, and two adjacent pixel unites share the same one through hole in the extending direction of the grid lines; an enough large distance is formed between two adjacent transverse through holes, so that isolation columns are well placed, the problem that the isolation columns are instable in standing and unlikely to slide down is avoided, and the uniformity of the thickness of a panel box and better surface pressure ability are ensured.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a thin film transistor array substrate, a display panel and a display device. Background technique [0002] In the existing liquid crystal display (Liquid Crystal Display, LCD) pixel structure, especially for the pixel structure in In-Plane Switching (In-Plane Switching, IPS) and Fringe Field Switching (Fringe Field Switching, FFS) mode, in order to make The electric field is uniform in the horizontal direction, and a planarization layer (Planarization, PLN) will be formed before forming the pixel electrodes. And form uniformly distributed through holes 101 in the PLN layer (such as figure 1 shown in the first case), and the through hole 101 is located above the thin film transistor (Thin Film Transistor, TFT), and is used to connect the pixel electrode of the pixel unit where it is located and the drain of the TFT. Wherein, the supporting position of the photoresist spacer (P...

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Problems solved by technology

[0003] When the size of each sub-pixel is reduced in order to increase the pixel display density of the LCD, the PLN holes need to maintain the original size due to process limitations, so that the distance between adjacent PLN holes is relatively close, which will lead to isolation of the photoresist material If there is an arc at the support position where the column is located, the photoresist material isolation column cannot be in full contact with the lower substrate. When the vacuum bonding is poor, the photoresist material isolation column is easy to slide into the PLN hole, resulting in The thickness of the cell at the location of the material isolation column is relatively low; moreover, during manual operation, the sliding of the photoresist material isolation column can easily lead to scratches on the alignment film

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