Direct digital frequency synthesizer
A digital frequency synthesis, direct technology, applied in the direction of automatic power control, electrical components, etc., can solve the problem of increased power consumption of direct digital frequency Effect
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0033] Such as Figure 2-5As shown, a preferred embodiment of a direct digital frequency synthesizer of the present invention, wherein n is 16, m is 2, and the clock frequency division module 1 divides the frequency of the system clock Fclk into 2 frequency division, 4 frequency division and 16 frequency division . The frequency division by 16 provides the working clock for the phase accumulation module 2, the phase division module 3 and the phase-amplitude conversion module 4, the frequency division by 4 provides the sampling clock for the first interleaving sampling module 5, and the frequency division by 2 provides sampling for the second interleaving sampling module 7 clock. The phase splitting module takes the accumulated phase based on one-sixteenth of the frequency control word K, and delays it by K / 16 in turn to obtain 16 groups of phase words, which are respectively entered into the phase-amplitude conversion module for conversion.
[0034] The data after the phase-...
Embodiment 2
[0038] Such as figure 2 As shown, a preferred embodiment of a direct digital frequency synthesizer of the present invention, wherein n is 24, m is 3, the frequency control word K enters the phase accumulation module 2 of the direct digital frequency synthesizer, and is preset by the phase accumulation module 2 The processor pre-processes, so that the phase can be divided into the expected 24 channels in the later phase division.
[0039] Such as figure 2 As shown, the clock frequency division module 1 divides the frequency of the system clock Fclk to obtain frequency division by 2, frequency division by 4, frequency division by 8 and frequency division by 24, respectively, and provide them to the following functional modules respectively. Frequency division by 2 and frequency division by 4 provides the sampling clock for the second interleaved sampling module 7, frequency division by 8 provides the sampling clock for the first interleaved sampling module 5, and frequency di...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 